zengdage wrote: @mga-sc Hi, can you help to review the pr? I add RVVM1/2/4/8 in VFISAKind to support multiple LMUL value, maybe it can take full advantage of rvv register group. Your pr (https://github.com/llvm/llvm-project/pull/114014) looks like just support LMUL=2.
https://github.com/llvm/llvm-project/pull/119844 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
