================
@@ -1949,24 +1955,48 @@ bool SPIRVInstructionSelector::selectSign(Register
ResVReg,
return Result;
}
+bool SPIRVInstructionSelector::selectWaveNOpInst(Register ResVReg,
+ const SPIRVType *ResType,
+ MachineInstr &I,
+ unsigned Opcode,
+ unsigned OperandCount) const {
+ assert(I.getNumOperands() == OperandCount);
+ for (unsigned j = 2; j < OperandCount; j++) {
+ assert(I.getOperand(j).isReg());
+ }
+
+ MachineBasicBlock &BB = *I.getParent();
+ SPIRVType *IntTy = GR.getOrCreateSPIRVIntegerType(32, I, TII);
+
+ auto BMI = BuildMI(BB, I, I.getDebugLoc(), TII.get(Opcode))
+ .addDef(ResVReg)
+ .addUse(GR.getSPIRVTypeID(ResType))
+ .addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I,
+ IntTy, TII));
+
+ for (unsigned j = 2; j < OperandCount; j++) {
+ BMI.addUse(I.getOperand(j).getReg());
+ }
+
+ return BMI.constrainAllUses(TII, TRI, RBI);
+}
+
+bool SPIRVInstructionSelector::selectWaveActiveAnyTrue(Register ResVReg,
+ const SPIRVType
*ResType,
+ MachineInstr &I) const {
+ return selectWaveNOpInst(ResVReg, ResType, I, SPIRV::OpGroupNonUniformAny,
3);
----------------
V-FEXrt wrote:
N/A after removing `OperandCount`
https://github.com/llvm/llvm-project/pull/115902
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