================
@@ -152,22 +152,91 @@ static bool hasLiveDefs(const MachineInstr &MI, const
TargetRegisterInfo *TRI) {
return false;
}
-void BPFMIPreEmitChecking::processAtomicInsts() {
+bool BPFMIPreEmitChecking::processAtomicInsts() {
+ if (!MF->getSubtarget<BPFSubtarget>().getHasJmp32()) {
+ // Only check for cpu version 1 and 2.
+ for (MachineBasicBlock &MBB : *MF) {
+ for (MachineInstr &MI : MBB) {
+ if (MI.getOpcode() != BPF::XADDW && MI.getOpcode() != BPF::XADDD)
+ continue;
+
+ LLVM_DEBUG(MI.dump());
+ if (hasLiveDefs(MI, TRI)) {
+ DebugLoc Empty;
+ const DebugLoc &DL = MI.getDebugLoc();
+ const Function &F = MF->getFunction();
+ F.getContext().diagnose(DiagnosticInfoUnsupported{
+ F, "Invalid usage of the XADD return value", DL});
+ }
+ }
+ }
+ }
+
+ // Check return values of atomic_fetch_and_{add,and,or,xor}.
+ // If the return is not used, the atomic_fetch_and_<op> instruction
+ // is replaced with atomic_<op> instruction.
+ MachineInstr *ToErase = nullptr;
+ bool Changed = false;
+ const BPFInstrInfo *TII = MF->getSubtarget<BPFSubtarget>().getInstrInfo();
for (MachineBasicBlock &MBB : *MF) {
for (MachineInstr &MI : MBB) {
- if (MI.getOpcode() != BPF::XADDW && MI.getOpcode() != BPF::XADDD)
+ if (ToErase) {
----------------
yonghong-song wrote:
Will add a comment.
For
> Also, won't delete the last instruction in the basic block, would this be a
> problem if instruction is used in a later basic block?
I think we should be okay since register definition is preserved. But let me
double check.
https://github.com/llvm/llvm-project/pull/107343
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