================
@@ -864,26 +864,119 @@ class XFALU32<BPFWidthModifer SizeOp, BPFArithOp Opc,
string OpcodeStr,
let Constraints = "$dst = $val" in {
let Predicates = [BPFHasALU32], DecoderNamespace = "BPFALU32" in {
- def XFADDW32 : XFALU32<BPF_W, BPF_ADD, "u32", "add", atomic_load_add_i32>;
- def XFANDW32 : XFALU32<BPF_W, BPF_AND, "u32", "and", atomic_load_and_i32>;
- def XFORW32 : XFALU32<BPF_W, BPF_OR, "u32", "or", atomic_load_or_i32>;
- def XFXORW32 : XFALU32<BPF_W, BPF_XOR, "u32", "xor", atomic_load_xor_i32>;
+ def XFADDW32 : XFALU32<BPF_W, BPF_ADD, "u32", "add",
atomic_load_add_i32_seq_cst>;
+ def XFANDW32 : XFALU32<BPF_W, BPF_AND, "u32", "and",
atomic_load_and_i32_seq_cst>;
+ def XFORW32 : XFALU32<BPF_W, BPF_OR, "u32", "or",
atomic_load_or_i32_seq_cst>;
+ def XFXORW32 : XFALU32<BPF_W, BPF_XOR, "u32", "xor",
atomic_load_xor_i32_seq_cst>;
}
let Predicates = [BPFHasALU32] in {
- def XFADDD : XFALU64<BPF_DW, BPF_ADD, "u64", "add", atomic_load_add_i64>;
+ def XFADDD : XFALU64<BPF_DW, BPF_ADD, "u64", "add",
atomic_load_add_i64_seq_cst>;
}
- def XFANDD : XFALU64<BPF_DW, BPF_AND, "u64", "and", atomic_load_and_i64>;
- def XFORD : XFALU64<BPF_DW, BPF_OR, "u64", "or", atomic_load_or_i64>;
- def XFXORD : XFALU64<BPF_DW, BPF_XOR, "u64", "xor", atomic_load_xor_i64>;
+ def XFANDD : XFALU64<BPF_DW, BPF_AND, "u64", "and",
atomic_load_and_i64_seq_cst>;
+ def XFORD : XFALU64<BPF_DW, BPF_OR, "u64", "or",
atomic_load_or_i64_seq_cst>;
+ def XFXORD : XFALU64<BPF_DW, BPF_XOR, "u64", "xor",
atomic_load_xor_i64_seq_cst>;
+}
+
+let Predicates = [BPFHasALU32] in {
+ def : Pat<(atomic_load_add_i32_monotonic ADDRri:$addr, GPR32:$val),
+ (XADDW32 ADDRri:$addr, GPR32:$val)>;
+ def : Pat<(atomic_load_add_i32_acquire ADDRri:$addr, GPR32:$val),
+ (XFADDW32 ADDRri:$addr, GPR32:$val)>;
+ def : Pat<(atomic_load_add_i32_release ADDRri:$addr, GPR32:$val),
+ (XFADDW32 ADDRri:$addr, GPR32:$val)>;
+ def : Pat<(atomic_load_add_i32_acq_rel ADDRri:$addr, GPR32:$val),
+ (XFADDW32 ADDRri:$addr, GPR32:$val)>;
+
+ def : Pat<(atomic_load_add_i64_monotonic ADDRri:$addr, GPR:$val),
+ (XADDD ADDRri:$addr, GPR:$val)>;
+ def : Pat<(atomic_load_add_i64_acquire ADDRri:$addr, GPR:$val),
+ (XFADDD ADDRri:$addr, GPR:$val)>;
+ def : Pat<(atomic_load_add_i64_release ADDRri:$addr, GPR:$val),
+ (XFADDD ADDRri:$addr, GPR:$val)>;
+ def : Pat<(atomic_load_add_i64_acq_rel ADDRri:$addr, GPR:$val),
+ (XFADDD ADDRri:$addr, GPR:$val)>;
}
// atomic_load_sub can be represented as a neg followed
// by an atomic_load_add.
-def : Pat<(atomic_load_sub_i32 ADDRri:$addr, GPR32:$val),
+// FIXME: the below can probably be simplified.
----------------
eddyz87 wrote:
E.g. use a `foreach` as in this
[patch](https://github.com/user-attachments/files/16938017/foreach.diff.txt),
wdyt?
There is probably a way to use `multiclass` to factor out tuples `["i32",
"W32", GPR32]` and `["i64", "D", GPR]` but my tablegen skills were not
sufficient enough :)
https://github.com/llvm/llvm-project/pull/107343
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
