abel-bernabeu updated this revision to Diff 532268.
abel-bernabeu added a comment.
The test has been moved to llvm/test/CodeGen/RISCV
Also has been reworked for using LLVM IR as input, so clang is not needed in
the loop.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153008/new/
https://reviews.llvm.org/D153008
Files:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/test/CodeGen/RISCV/inline-asm-gcc-comments.ll
Index: llvm/test/CodeGen/RISCV/inline-asm-gcc-comments.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/inline-asm-gcc-comments.ll
@@ -0,0 +1,17 @@
+; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32f -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefix=RV32IF %s
+; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi lp64f -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefix=RV64IF %s
+
+define i64 @f() #0 {
+; RV32IF-LABEL: f:
+; RV32IF: li a0, 0 # this is fine # this is also fine # and last but not least
+;
+; RV64IF-LABEL: f:
+; RV64IF: li a0, 0 # this is fine # this is also fine # and last but not least
+ %1 = alloca i64, align 8
+ %2 = call i64 asm "li /* this is fine */ $0 , /* this is also fine */ 0 /* and last but not least */\0A", "=r"()
+ store i64 %2, ptr %1, align 8
+ %3 = load i64, ptr %1, align 8
+ ret i64 %3
+}
\ No newline at end of file
Index: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
===================================================================
--- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -1617,7 +1617,7 @@
Operands.push_back(RISCVOperand::createToken("(", FirstS));
SMLoc S = getLoc();
SMLoc E = SMLoc::getFromPointer(S.getPointer() + Name.size());
- getLexer().Lex();
+ getParser().Lex();
Operands.push_back(RISCVOperand::createReg(RegNo, S, E));
}
@@ -1978,11 +1978,11 @@
return MatchOperand_Success;
case AsmToken::Plus:
Opcode = MCBinaryExpr::Add;
- getLexer().Lex();
+ getParser().Lex();
break;
case AsmToken::Minus:
Opcode = MCBinaryExpr::Sub;
- getLexer().Lex();
+ getParser().Lex();
break;
}
@@ -2131,11 +2131,11 @@
MaskAgnostic))
return MatchOperand_NoMatch;
- getLexer().Lex();
+ getParser().Lex();
while (getLexer().is(AsmToken::Comma)) {
// Consume comma.
- getLexer().Lex();
+ getParser().Lex();
if (getLexer().isNot(AsmToken::Identifier))
break;
@@ -2146,7 +2146,7 @@
MaskAgnostic))
break;
- getLexer().Lex();
+ getParser().Lex();
}
if (getLexer().is(AsmToken::EndOfStatement) && State == VTypeState_Done) {
@@ -2186,7 +2186,7 @@
return MatchOperand_NoMatch;
SMLoc S = getLoc();
SMLoc E = SMLoc::getFromPointer(S.getPointer() + Name.size());
- getLexer().Lex();
+ getParser().Lex();
Operands.push_back(RISCVOperand::createReg(RegNo, S, E));
return MatchOperand_Success;
}
@@ -2202,7 +2202,7 @@
return MatchOperand_NoMatch;
SMLoc S = getLoc();
SMLoc E = SMLoc::getFromPointer(S.getPointer() + Name.size());
- getLexer().Lex();
+ getParser().Lex();
Operands.push_back(RISCVOperand::createReg(
RegNo, S, E, !getSTI().hasFeature(RISCV::FeatureStdExtF)));
return MatchOperand_Success;
@@ -2391,11 +2391,11 @@
Error(getLoc(), "register list must start from 'ra' or 'x1'");
return MatchOperand_ParseFail;
}
- getLexer().Lex();
+ getParser().Lex();
// parse case like ,s0
if (getLexer().is(AsmToken::Comma)) {
- getLexer().Lex();
+ getParser().Lex();
if (getLexer().isNot(AsmToken::Identifier)) {
Error(getLoc(), "invalid register");
return MatchOperand_ParseFail;
@@ -2410,12 +2410,12 @@
Error(getLoc(), "continuous register list must start from 's0' or 'x8'");
return MatchOperand_ParseFail;
}
- getLexer().Lex(); // eat reg
+ getParser().Lex(); // eat reg
}
// parse case like -s1
if (getLexer().is(AsmToken::Minus)) {
- getLexer().Lex();
+ getParser().Lex();
StringRef EndName = getLexer().getTok().getIdentifier();
// FIXME: the register mapping and checks of EABI is wrong
RegEnd = matchRegisterNameHelper(IsEABI, EndName);
@@ -2428,7 +2428,7 @@
"'x8-x9' pair");
return MatchOperand_ParseFail;
}
- getLexer().Lex();
+ getParser().Lex();
}
if (!IsEABI) {
@@ -2442,7 +2442,7 @@
}
// parse ', x18' for extra part
- getLexer().Lex();
+ getParser().Lex();
if (getLexer().isNot(AsmToken::Identifier)) {
Error(getLoc(), "invalid register");
return MatchOperand_ParseFail;
@@ -2453,11 +2453,11 @@
"must start from 'x18'");
return MatchOperand_ParseFail;
}
- getLexer().Lex();
+ getParser().Lex();
// parse '-x20' for extra part
if (getLexer().is(AsmToken::Minus)) {
- getLexer().Lex();
+ getParser().Lex();
if (getLexer().isNot(AsmToken::Identifier)) {
Error(getLoc(), "invalid register");
return MatchOperand_ParseFail;
@@ -2467,7 +2467,7 @@
Error(getLoc(), "invalid register");
return MatchOperand_ParseFail;
}
- getLexer().Lex();
+ getParser().Lex();
}
RegEnd = MatchRegisterName(EndName);
}
@@ -2497,7 +2497,7 @@
OperandMatchResultTy RISCVAsmParser::parseZcmpSpimm(OperandVector &Operands) {
if (getLexer().is(AsmToken::Minus))
- getLexer().Lex();
+ getParser().Lex();
SMLoc S = getLoc();
int64_t StackAdjustment = getLexer().getTok().getIntVal();
@@ -2508,7 +2508,7 @@
if (!RISCVZC::getSpimm(RlistVal, Spimm, StackAdjustment, isRV64(), IsEABI))
return MatchOperand_NoMatch;
Operands.push_back(RISCVOperand::createSpimm(Spimm << 4, S));
- getLexer().Lex();
+ getParser().Lex();
return MatchOperand_Success;
}
@@ -2576,7 +2576,7 @@
// Parse until end of statement, consuming commas between operands
while (getLexer().is(AsmToken::Comma)) {
// Consume comma token
- getLexer().Lex();
+ getParser().Lex();
// Parse next operand
if (parseOperand(Operands, Name))
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