amyk added a comment.

Overall looks OK to me, as well. I just had two questions that I wanted to ask.



================
Comment at: clang/include/clang/Basic/BuiltinsPPC.def:444
+TARGET_BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "", "power9-vector")
+TARGET_BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "", "altivec")
+
----------------
Does this need to be `vsx`?


================
Comment at: clang/include/clang/Basic/BuiltinsPPC.def:820
+TARGET_BUILTIN(__builtin_vsx_xvcvspbf16, "V16UcV16Uc", "", "power10-vector")
+TARGET_BUILTIN(__builtin_vsx_xvcvbf16spn, "V16UcV16Uc", "", "vsx")
 
----------------
Should this be `power10-vector`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143467/new/

https://reviews.llvm.org/D143467

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