arsenm added inline comments.
================ Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:4819-4831 + // When we don't have 16 bit instructions, bf16 is illegal and gets + // softened to i16 for storage, with float being used for arithmetic. + // + // After softening, some i16 -> fp32 bf16_to_fp operations can be left over. + // Lower those to (f32 (fp_extend (f16 (bitconvert x)))) + if (!Op->getValueType(0).isFloatingPoint() || + Op->getOperand(0).getValueType() != MVT::i16) ---------------- Pierre-vh wrote: > arsenm wrote: > > The generic legalizer should have handled this? > It looks like those operations are not implemented in the generic legalizer, > e.g. I get > ``` > Do not know how to promote this operator's operand! > ``` Right, this is the code that would go there Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D139398/new/ https://reviews.llvm.org/D139398 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
