arsenm added inline comments.
================ Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:147 addRegisterClass(MVT::f16, &AMDGPU::SReg_32RegClass); + addRegisterClass(MVT::bf16, &AMDGPU::SReg_32RegClass); ---------------- Do you really need to add this to a register class? The only thing this would be useful for is for the calling convention contexts, which should promote to i16. If you do that you don't need most of the rest of this patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D139398/new/ https://reviews.llvm.org/D139398 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits