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Test case to show the wrong code gen for `int16` -> `__fp16` conversion,
clang just emit a load and store without did conversion in the case,
and another case used for demonstrate the code gen improvement of `__fp16`
-> `int16`.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D124510
Files:
clang/test/CodeGen/RISCV/__fp16-convert.c
Index: clang/test/CodeGen/RISCV/__fp16-convert.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/RISCV/__fp16-convert.c
@@ -0,0 +1,26 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple riscv64 -emit-llvm %s -o - \
+// RUN: | FileCheck %s
+
+__fp16 y;
+short z;
+// CHECK-LABEL: @bar1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @y, align 2
+// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.convert.from.fp16.f32(i16
[[TMP0]])
+// CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP1]] to i16
+// CHECK-NEXT: store i16 [[CONV]], ptr @z, align 2
+// CHECK-NEXT: ret void
+//
+void bar1(){
+ z = y;
+}
+// CHECK-LABEL: @bar2(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @z, align 2
+// CHECK-NEXT: store i16 [[TMP0]], ptr @y, align 2
+// CHECK-NEXT: ret void
+//
+void bar2(){
+ y = z;
+}
Index: clang/test/CodeGen/RISCV/__fp16-convert.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/RISCV/__fp16-convert.c
@@ -0,0 +1,26 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple riscv64 -emit-llvm %s -o - \
+// RUN: | FileCheck %s
+
+__fp16 y;
+short z;
+// CHECK-LABEL: @bar1(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @y, align 2
+// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.convert.from.fp16.f32(i16 [[TMP0]])
+// CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP1]] to i16
+// CHECK-NEXT: store i16 [[CONV]], ptr @z, align 2
+// CHECK-NEXT: ret void
+//
+void bar1(){
+ z = y;
+}
+// CHECK-LABEL: @bar2(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @z, align 2
+// CHECK-NEXT: store i16 [[TMP0]], ptr @y, align 2
+// CHECK-NEXT: ret void
+//
+void bar2(){
+ y = z;
+}
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