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clang emit wrong code sequence for int16(short) to __fp16 conversion,
and that should fix the code gen directly is the right way I think,
but I found there is a FIXME comment in clang/Basic/TargetInfo.h say
that's should be removed in future so I think just let swich to using
generic LLVM IR rather than llvm.convert.to.fp16 intrinsics code gen
path is enough, and the code gen apperantly more concise for __fp16 to
int16 conversion.
/// Check whether llvm intrinsics such as llvm.convert.to.fp16 should be used
/// to convert to and from __fp16.
/// FIXME: This function should be removed once all targets stop using the
/// conversion intrinsics.
virtual bool useFP16ConversionIntrinsics() const {
return true;
}
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D124509
Files:
clang/lib/Basic/Targets/RISCV.h
clang/test/CodeGen/RISCV/__fp16-convert.c
Index: clang/test/CodeGen/RISCV/__fp16-convert.c
===================================================================
--- clang/test/CodeGen/RISCV/__fp16-convert.c
+++ clang/test/CodeGen/RISCV/__fp16-convert.c
@@ -6,10 +6,10 @@
short z;
// CHECK-LABEL: @bar1(
// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @y, align 2
-// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.convert.from.fp16.f32(i16
[[TMP0]])
-// CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP1]] to i16
-// CHECK-NEXT: store i16 [[CONV]], ptr @z, align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @y, align 2
+// CHECK-NEXT: [[CONV:%.*]] = fpext half [[TMP0]] to float
+// CHECK-NEXT: [[CONV1:%.*]] = fptosi float [[CONV]] to i16
+// CHECK-NEXT: store i16 [[CONV1]], ptr @z, align 2
// CHECK-NEXT: ret void
//
void bar1(){
@@ -18,7 +18,9 @@
// CHECK-LABEL: @bar2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @z, align 2
-// CHECK-NEXT: store i16 [[TMP0]], ptr @y, align 2
+// CHECK-NEXT: [[CONV:%.*]] = sitofp i16 [[TMP0]] to float
+// CHECK-NEXT: [[CONV1:%.*]] = fptrunc float [[CONV]] to half
+// CHECK-NEXT: store half [[CONV1]], ptr @y, align 2
// CHECK-NEXT: ret void
//
void bar2(){
Index: clang/lib/Basic/Targets/RISCV.h
===================================================================
--- clang/lib/Basic/Targets/RISCV.h
+++ clang/lib/Basic/Targets/RISCV.h
@@ -96,6 +96,10 @@
DiagnosticsEngine &Diags) override;
bool hasBitIntType() const override { return true; }
+
+ bool useFP16ConversionIntrinsics() const override {
+ return false;
+ }
};
class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
public:
Index: clang/test/CodeGen/RISCV/__fp16-convert.c
===================================================================
--- clang/test/CodeGen/RISCV/__fp16-convert.c
+++ clang/test/CodeGen/RISCV/__fp16-convert.c
@@ -6,10 +6,10 @@
short z;
// CHECK-LABEL: @bar1(
// CHECK-NEXT: entry:
-// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @y, align 2
-// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.convert.from.fp16.f32(i16 [[TMP0]])
-// CHECK-NEXT: [[CONV:%.*]] = fptosi float [[TMP1]] to i16
-// CHECK-NEXT: store i16 [[CONV]], ptr @z, align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @y, align 2
+// CHECK-NEXT: [[CONV:%.*]] = fpext half [[TMP0]] to float
+// CHECK-NEXT: [[CONV1:%.*]] = fptosi float [[CONV]] to i16
+// CHECK-NEXT: store i16 [[CONV1]], ptr @z, align 2
// CHECK-NEXT: ret void
//
void bar1(){
@@ -18,7 +18,9 @@
// CHECK-LABEL: @bar2(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @z, align 2
-// CHECK-NEXT: store i16 [[TMP0]], ptr @y, align 2
+// CHECK-NEXT: [[CONV:%.*]] = sitofp i16 [[TMP0]] to float
+// CHECK-NEXT: [[CONV1:%.*]] = fptrunc float [[CONV]] to half
+// CHECK-NEXT: store half [[CONV1]], ptr @y, align 2
// CHECK-NEXT: ret void
//
void bar2(){
Index: clang/lib/Basic/Targets/RISCV.h
===================================================================
--- clang/lib/Basic/Targets/RISCV.h
+++ clang/lib/Basic/Targets/RISCV.h
@@ -96,6 +96,10 @@
DiagnosticsEngine &Diags) override;
bool hasBitIntType() const override { return true; }
+
+ bool useFP16ConversionIntrinsics() const override {
+ return false;
+ }
};
class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
public:
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