[PATCH] D117913: [Clang][RISCV] Guard vmulh, vsmul correctly

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:812
       RISCVPredefinedMacros |= RISCVPredefinedMacro::RV64;
+    if (Extension == "FullMultiply" &&
+        (RISCVPredefinedMacros & RISCVPredefinedMacro::VectorMaxELen64))
----------------
Can you add a comment here. I should have in my original patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117913/new/

https://reviews.llvm.org/D117913

_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits