khchen updated this revision to Diff 357148.
khchen added a comment.
Herald added subscribers: llvm-commits, dexonsmith, hiraditya.
Herald added a project: LLVM.
address jrtc27's comment.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105555/new/
https://reviews.llvm.org/D105555
Files:
clang/lib/Basic/Targets/RISCV.cpp
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
clang/test/CodeGen/RISCV/riscv-metadata.c
llvm/include/llvm/Support/TargetParser.h
llvm/lib/Support/TargetParser.cpp
Index: llvm/lib/Support/TargetParser.cpp
===================================================================
--- llvm/lib/Support/TargetParser.cpp
+++ llvm/lib/Support/TargetParser.cpp
@@ -331,5 +331,18 @@
return true;
}
+StringRef computeABIByArch(bool hasD, bool hasE, bool is64Bit) {
+ if (!is64Bit) {
+ if (hasD)
+ return "ilp32d";
+ else if (hasE)
+ return "ilp32e";
+ return "ilp32";
+ }
+ if (hasD)
+ return "lp64d";
+ return "lp64";
+}
+
} // namespace RISCV
} // namespace llvm
Index: llvm/include/llvm/Support/TargetParser.h
===================================================================
--- llvm/include/llvm/Support/TargetParser.h
+++ llvm/include/llvm/Support/TargetParser.h
@@ -174,6 +174,7 @@
void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64);
bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features);
StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64);
+StringRef computeABIByArch(bool hasD, bool hasE, bool IsRV64);
} // namespace RISCV
Index: clang/test/CodeGen/RISCV/riscv-metadata.c
===================================================================
--- clang/test/CodeGen/RISCV/riscv-metadata.c
+++ clang/test/CodeGen/RISCV/riscv-metadata.c
@@ -1,14 +1,28 @@
+// RUN: %clang_cc1 -triple riscv32 -emit-llvm -o - %s | FileCheck -check-prefix=EMPTY-ILP32 %s
+// RUN: %clang_cc1 -triple riscv32 -emit-llvm -target-feature +f -target-feature +d -o - %s | FileCheck -check-prefix=EMPTY-ILP32D %s
// RUN: %clang_cc1 -triple riscv32 -target-abi ilp32 -emit-llvm -o - %s | FileCheck -check-prefix=ILP32 %s
// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm -o - %s | FileCheck -check-prefix=ILP32F %s
// RUN: %clang_cc1 -triple riscv32 -target-feature +d -target-abi ilp32d -emit-llvm -o - %s | FileCheck -check-prefix=ILP32D %s
+// RUN: %clang_cc1 -triple riscv64 -emit-llvm -o - %s | FileCheck -check-prefix=EMPTY-LP64 %s
+// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -emit-llvm -o - %s | FileCheck -check-prefix=EMPTY-LP64D %s
// RUN: %clang_cc1 -triple riscv64 -target-abi lp64 -emit-llvm -o - %s | FileCheck -check-prefix=LP64 %s
// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm -o - %s | FileCheck -check-prefix=LP64F %s
// RUN: %clang_cc1 -triple riscv64 -target-feature +d -target-abi lp64d -emit-llvm -o - %s | FileCheck -check-prefix=LP64D %s
+// Test expected behavior when giving -target-cpu
+// This cc1 test is similar to clang with -march=rv32ifd -mcpu=sifive-e31, default abi is ilp32d
+// RUN: %clang_cc1 -triple riscv32 -emit-llvm -target-feature +f -target-feature +d -target-cpu sifive-e31 -o - %s | FileCheck -check-prefix=EMPTY-ILP32D %s
+// This cc1 test is similar to clang with -march=rv64i -mcpu=sifive-u74, default abi is lp64
+// RUN: %clang_cc1 -triple riscv64 -emit-llvm -o - -target-cpu sifive-u74 %s | FileCheck -check-prefix=EMPTY-LP64 %s
+
+// EMPTY-ILP32: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32"}
+// EMPTY-ILP32D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32d"}
// ILP32: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32"}
// ILP32F: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32f"}
// ILP32D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"ilp32d"}
+// EMPTY-LP64: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64"}
+// EMPTY-LP64D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64d"}
// LP64: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64"}
// LP64F: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64f"}
// LP64D: !{{[0-9]+}} = !{i32 1, !"target-abi", !"lp64d"}
Index: clang/lib/Driver/ToolChains/Arch/RISCV.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -614,20 +614,16 @@
if (MArch.startswith_insensitive("rv32")) {
// FIXME: parse `March` to find `D` extension properly
- if (MArch.substr(4).contains_insensitive("d") ||
- MArch.startswith_insensitive("rv32g"))
- return "ilp32d";
- else if (MArch.startswith_insensitive("rv32e"))
- return "ilp32e";
- else
- return "ilp32";
+ bool hasD = MArch.substr(4).contains_insensitive("d") ||
+ MArch.startswith_insensitive("rv32g");
+ bool hasE = MArch.startswith_insensitive("rv32e");
+ return llvm::RISCV::computeABIByArch(hasD, hasE, /*IsRV64=*/false);
} else if (MArch.startswith_insensitive("rv64")) {
// FIXME: parse `March` to find `D` extension properly
- if (MArch.substr(4).contains_insensitive("d") ||
- MArch.startswith_insensitive("rv64g"))
- return "lp64d";
- else
- return "lp64";
+ bool hasD = MArch.substr(4).contains_insensitive("d") ||
+ MArch.startswith_insensitive("rv64g");
+ return llvm::RISCV::computeABIByArch(hasD, /*hasE=*/false,
+ /*IsRV64=*/true);
}
// 3. Choose a default based on the triple
Index: clang/lib/Basic/Targets/RISCV.cpp
===================================================================
--- clang/lib/Basic/Targets/RISCV.cpp
+++ clang/lib/Basic/Targets/RISCV.cpp
@@ -329,6 +329,12 @@
HasZvlsseg = true;
}
+ // Use the explicitly target-feature to compute default ABI.
+ if (getABI().empty()) {
+ bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64;
+ ABI = llvm::RISCV::computeABIByArch(HasD, /*HasE=*/false, Is64Bit).str();
+ }
+
return true;
}
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