efriedma accepted this revision. efriedma added a comment. This revision is now accepted and ready to land.
LGTM ================ Comment at: clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c:108 +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <2 x i8>* [[SAVED_VALUE]] to <vscale x 16 x i1>* +// CHECK-128-NEXT: [[TMP1:%.*]] = load <vscale x 16 x i1>, <vscale x 16 x i1>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-128-NEXT: ret <vscale x 16 x i1> [[TMP1]] ---------------- Oh, hmm, this is the case where we can't optimize. We could probably teach instcombine to convert this pattern into a load directly from the global, if it matters. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105097/new/ https://reviews.llvm.org/D105097 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
