Author: Ties Stuij Date: 2021-02-18T15:41:20Z New Revision: 5f7715d8780a1d16ad023995d282a7d94cb923a9
URL: https://github.com/llvm/llvm-project/commit/5f7715d8780a1d16ad023995d282a7d94cb923a9 DIFF: https://github.com/llvm/llvm-project/commit/5f7715d8780a1d16ad023995d282a7d94cb923a9.diff LOG: Pass the cmdline aapcs bitfield options to cc1 The following commits added commandline arguments to control following the Arm Procedure Call Standard for certain volatile bitfield operations: - https://reviews.llvm.org/D67399 - https://reviews.llvm.org/D72932 This commit fixes the oversight that these args weren't passed from the driver to cc1 if appropriate. Where *appropriate* means: - `-faapcs-bitfield-width`: is the default, so won't be passed - `-fno-aapcs-bitfield-width`: should be passed - `-faapcs-bitfield-load`: should be passed Differential Revision: https://reviews.llvm.org/D96784 Added: clang/test/Driver/arm-aarch64-bitfield-flags.c Modified: clang/lib/Driver/ToolChains/Clang.cpp Removed: ################################################################################ diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index eaaef6b78ffb..2fe5bbe2f06c 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -1528,6 +1528,15 @@ static void renderRemarksOptions(const ArgList &Args, ArgStringList &CmdArgs, } } +void AddAAPCSVolatileBitfieldArgs(const ArgList &Args, ArgStringList &CmdArgs) { + if (!Args.hasFlag(options::OPT_faapcs_bitfield_width, + options::OPT_fno_aapcs_bitfield_width, true)) + CmdArgs.push_back("-fno-aapcs-bitfield-width"); + + if (Args.getLastArg(options::OPT_ForceAAPCSBitfieldLoad)) + CmdArgs.push_back("-faapcs-bitfield-load"); +} + namespace { void RenderARMABI(const llvm::Triple &Triple, const ArgList &Args, ArgStringList &CmdArgs) { @@ -1586,6 +1595,8 @@ void Clang::AddARMTargetArgs(const llvm::Triple &Triple, const ArgList &Args, if (Args.getLastArg(options::OPT_mcmse)) CmdArgs.push_back("-mcmse"); + + AddAAPCSVolatileBitfieldArgs(Args, CmdArgs); } void Clang::RenderTargetOptions(const llvm::Triple &EffectiveTriple, @@ -1774,6 +1785,8 @@ void Clang::AddAArch64TargetArgs(const ArgList &Args, D.Diag(diag::err_drv_unsupported_option_argument) << A->getOption().getName() << Val; } + + AddAAPCSVolatileBitfieldArgs(Args, CmdArgs); } void Clang::AddMIPSTargetArgs(const ArgList &Args, diff --git a/clang/test/Driver/arm-aarch64-bitfield-flags.c b/clang/test/Driver/arm-aarch64-bitfield-flags.c new file mode 100644 index 000000000000..a7961c6eedc3 --- /dev/null +++ b/clang/test/Driver/arm-aarch64-bitfield-flags.c @@ -0,0 +1,18 @@ +/// check -faapcs-bitfield-width/-fno-aapcs-bitfield-width +// RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=WIDTH,INVERSE-WIDTH %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=WIDTH,INVERSE-WIDTH %s +// RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -fno-aapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=NO-WIDTH,WIDTH %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -fno-aapcs-bitfield-width -### %s 2>&1 | FileCheck --check-prefixes=NO-WIDTH,WIDTH %s +// WIDTH-NOT: -faapcs-bitfield-width +// NO-WIDTH: -fno-aapcs-bitfield-width + +/// check -faapcs-bitfield-load +// RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-load -### %s 2>&1 | FileCheck --check-prefix=LOAD %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -faapcs-bitfield-load -### %s 2>&1 | FileCheck --check-prefix=LOAD %s +// LOAD: -faapcs-bitfield-load + +/// check absence of the above argument when not given +// RUN: %clang -target arm-arm-none-eabi -march=armv8-m.main -### %s 2>&1 | FileCheck --check-prefixes=INVERSE-WIDTH,INVERSE-LOAD %s +// RUN: %clang -target aarch64-arm-none-eabi -march=armv8-m.main -### %s 2>&1 | FileCheck --check-prefixes=INVERSE-WIDTH,INVERSE-LOAD %s +// INVERSE-WIDTH-NOT: -fno-aapcs-bitfield-width +// INVERSE-LOAD-NOT: -fno-aapcs-bitfield-load _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
