leonardchan added a comment.

In D74619#1936336 <https://reviews.llvm.org/D74619#1936336>, @pratlucas wrote:

> Hi @leonardchan ,
>
> I've double-checked the Neon intrinsics reference and it indeed confirms that 
> the only allowed value for the lane argument for `vdupq_lane_f64` is `0`:
>
>   Argument Preparation
>  
>   vec → Vn.1D 
>   0 << lane << 0
>
>
> (https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?search=vdupq_lane_f64)
>
> I believe the observed behaviour is expected.


Thanks for the update. Able to confirm this was an "us" issue, not a clang one.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74619/new/

https://reviews.llvm.org/D74619



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