pratlucas added a comment. Hi @leonardchan ,
I've double-checked the Neon intrinsics reference and it indeed confirms that the only allowed value for the lane argument for `vdupq_lane_f64` is `0`: Argument Preparation vec → Vn.1D 0 << lane << 0 (https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics?search=vdupq_lane_f64) I believe the observed behaviour is expected. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D74619/new/ https://reviews.llvm.org/D74619 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
