Modified: cfe/trunk/test/CodeGen/builtins-arm-exclusive.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm-exclusive.c?rev=263048&r1=263047&r2=263048&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/builtins-arm-exclusive.c (original) +++ cfe/trunk/test/CodeGen/builtins-arm-exclusive.c Wed Mar 9 12:54:42 2016 @@ -1,32 +1,6 @@ -// REQUIRES: arm-registered-target -// RUN: %clang_cc1 -Wall -Werror -triple thumbv8-linux-gnueabi -fno-signed-char -O3 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -Wall -Werror -triple arm64-apple-ios7.0 -O3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ARM64 - -// Make sure the canonical use works before going into smaller details: -int atomic_inc(int *addr) { - int Failure, OldVal; - do { - OldVal = __builtin_arm_ldrex(addr); - Failure = __builtin_arm_strex(OldVal + 1, addr); - } while (Failure); +// RUN: %clang_cc1 -Wall -Werror -triple thumbv8-linux-gnueabi -fno-signed-char -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s +// RUN: %clang_cc1 -Wall -Werror -triple arm64-apple-ios7.0 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s --check-prefix=CHECK-ARM64 - return OldVal; -} - -// CHECK-LABEL: @atomic_inc -// CHECK: [[OLDVAL:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* %addr) -// CHECK: [[INC:%.*]] = add nsw i32 [[OLDVAL]], 1 -// CHECK: [[FAILURE:%.*]] = tail call i32 @llvm.arm.strex.p0i32(i32 [[INC]], i32* %addr) -// CHECK: [[TST:%.*]] = icmp eq i32 [[FAILURE]], 0 -// CHECK: br i1 [[TST]], label {{%[a-zA-Z0-9.]+}}, label {{%[a-zA-Z0-9.]+}} - -// CHECK-ARM64-LABEL: @atomic_inc -// CHECK-ARM64: [[OLDVAL:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i32(i32* %addr) -// CHECK-ARM64: [[INC:%.*]] = add i64 [[OLDVAL]], 1 -// CHECK-ARM64: [[TRUNC:%.*]] = and i64 [[INC]], 4294967295 -// CHECK-ARM64: [[FAILURE:%.*]] = tail call i32 @llvm.aarch64.stxr.p0i32(i64 [[TRUNC]], i32* %addr) -// CHECK-ARM64: [[TST:%.*]] = icmp eq i32 [[FAILURE]], 0 -// CHECK-ARM64: br i1 [[TST]], label {{%[a-zA-Z0-9.]+}}, label {{%[a-zA-Z0-9.]+}} struct Simple { char a, b; @@ -37,36 +11,33 @@ int test_ldrex(char *addr, long long *ad // CHECK-ARM64-LABEL: @test_ldrex int sum = 0; sum += __builtin_arm_ldrex(addr); -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i8(i8* %addr) -// CHECK: and i32 [[INTRES]], 255 +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldrex.p0i8(i8* %addr) +// CHECK: trunc i32 [[INTRES]] to i8 -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i8(i8* %addr) -// CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 -// CHECK-ARM64: [[SEXTTMP:%.*]] = shl i32 [[TRUNCRES]], 24 -// CHECK-ARM64: ashr exact i32 [[SEXTTMP]], 24 +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i8(i8* %addr) +// CHECK-ARM64: trunc i64 [[INTRES]] to i8 sum += __builtin_arm_ldrex((short *)addr); // CHECK: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i16(i16* [[ADDR16]]) -// CHECK: [[TMPSEXT:%.*]] = shl i32 [[INTRES]], 16 -// CHECK: ashr exact i32 [[TMPSEXT]], 16 +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldrex.p0i16(i16* [[ADDR16]]) +// CHECK: trunc i32 [[INTRES]] to i16 // CHECK-ARM64: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i16(i16* [[ADDR16]]) -// CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 -// CHECK-ARM64: [[TMPSEXT:%.*]] = shl i32 [[TRUNCRES]], 16 -// CHECK-ARM64: ashr exact i32 [[TMPSEXT]], 16 +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i16(i16* [[ADDR16]]) +// CHECK-ARM64: trunc i64 [[INTRES]] to i16 sum += __builtin_arm_ldrex((int *)addr); // CHECK: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK: call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]]) +// CHECK: call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]]) // CHECK-ARM64: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i32(i32* [[ADDR32]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[ADDR32]]) // CHECK-ARM64: trunc i64 [[INTRES]] to i32 sum += __builtin_arm_ldrex((long long *)addr); -// CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* %addr) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to i64* +// CHECK: [[TMP5:%.*]] = bitcast i64* [[TMP4]] to i8* +// CHECK: call { i32, i32 } @llvm.arm.ldrexd(i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* // CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]]) @@ -79,16 +50,18 @@ int test_ldrex(char *addr, long long *ad sum += __builtin_arm_ldrex(addrfloat); // CHECK: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* [[INTADDR]]) +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldrex.p0i32(i32* [[INTADDR]]) // CHECK: bitcast i32 [[INTRES]] to float // CHECK-ARM64: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i32(i32* [[INTADDR]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[INTADDR]]) // CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 // CHECK-ARM64: bitcast i32 [[TRUNCRES]] to float sum += __builtin_arm_ldrex((double *)addr); -// CHECK: [[STRUCTRES:%.*]] = tail call { i32, i32 } @llvm.arm.ldrexd(i8* %addr) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i8* +// CHECK: [[STRUCTRES:%.*]] = call { i32, i32 } @llvm.arm.ldrexd(i8* [[TMP5]]) // CHECK: [[RESHI:%.*]] = extractvalue { i32, i32 } [[STRUCTRES]], 1 // CHECK: [[RESLO:%.*]] = extractvalue { i32, i32 } [[STRUCTRES]], 0 // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64 @@ -97,21 +70,31 @@ int test_ldrex(char *addr, long long *ad // CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]] // CHECK: bitcast i64 [[INTRES]] to double -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]]) // CHECK-ARM64: bitcast i64 [[INTRES]] to double sum += *__builtin_arm_ldrex((int **)addr); -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to i32** +// CHECK: [[TMP5:%.*]] = bitcast i32** [[TMP4]] to i32* +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldrex.p0i32(i32* [[TMP5]]) // CHECK: inttoptr i32 [[INTRES]] to i32* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to i32** +// CHECK-ARM64: [[TMP5:%.*]] = bitcast i32** [[TMP4]] to i64* +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to i32* sum += __builtin_arm_ldrex((struct Simple **)addr)->a; -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldrex.p0i32(i32* [[ADDR32]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i32* +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldrex.p0i32(i32* [[TMP5]]) // CHECK: inttoptr i32 [[INTRES]] to %struct.Simple* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to %struct.Simple* return sum; } @@ -121,36 +104,33 @@ int test_ldaex(char *addr, long long *ad // CHECK-ARM64-LABEL: @test_ldaex int sum = 0; sum += __builtin_arm_ldaex(addr); -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldaex.p0i8(i8* %addr) -// CHECK: and i32 [[INTRES]], 255 +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldaex.p0i8(i8* %addr) +// CHECK: trunc i32 [[INTRES]] to i8 -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i8(i8* %addr) -// CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 -// CHECK-ARM64: [[SEXTTMP:%.*]] = shl i32 [[TRUNCRES]], 24 -// CHECK-ARM64: ashr exact i32 [[SEXTTMP]], 24 +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i8(i8* %addr) +// CHECK-ARM64: trunc i64 [[INTRES]] to i8 sum += __builtin_arm_ldaex((short *)addr); // CHECK: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldaex.p0i16(i16* [[ADDR16]]) -// CHECK: [[TMPSEXT:%.*]] = shl i32 [[INTRES]], 16 -// CHECK: ashr exact i32 [[TMPSEXT]], 16 +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldaex.p0i16(i16* [[ADDR16]]) +// CHECK: trunc i32 [[INTRES]] to i16 // CHECK-ARM64: [[ADDR16:%.*]] = bitcast i8* %addr to i16* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i16(i16* [[ADDR16]]) -// CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 -// CHECK-ARM64: [[TMPSEXT:%.*]] = shl i32 [[TRUNCRES]], 16 -// CHECK-ARM64: ashr exact i32 [[TMPSEXT]], 16 +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i16(i16* [[ADDR16]]) +// CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i16 sum += __builtin_arm_ldaex((int *)addr); // CHECK: [[ADDR32:%.*]] = bitcast i8* %addr to i32* // CHECK: call i32 @llvm.arm.ldaex.p0i32(i32* [[ADDR32]]) // CHECK-ARM64: [[ADDR32:%.*]] = bitcast i8* %addr to i32* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i32(i32* [[ADDR32]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i32(i32* [[ADDR32]]) // CHECK-ARM64: trunc i64 [[INTRES]] to i32 sum += __builtin_arm_ldaex((long long *)addr); -// CHECK: call { i32, i32 } @llvm.arm.ldaexd(i8* %addr) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to i64* +// CHECK: [[TMP5:%.*]] = bitcast i64* [[TMP4]] to i8* +// CHECK: call { i32, i32 } @llvm.arm.ldaexd(i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* // CHECK-ARM64: call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]]) @@ -163,16 +143,18 @@ int test_ldaex(char *addr, long long *ad sum += __builtin_arm_ldaex(addrfloat); // CHECK: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldaex.p0i32(i32* [[INTADDR]]) +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldaex.p0i32(i32* [[INTADDR]]) // CHECK: bitcast i32 [[INTRES]] to float // CHECK-ARM64: [[INTADDR:%.*]] = bitcast float* %addrfloat to i32* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i32(i32* [[INTADDR]]) +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i32(i32* [[INTADDR]]) // CHECK-ARM64: [[TRUNCRES:%.*]] = trunc i64 [[INTRES]] to i32 // CHECK-ARM64: bitcast i32 [[TRUNCRES]] to float sum += __builtin_arm_ldaex((double *)addr); -// CHECK: [[STRUCTRES:%.*]] = tail call { i32, i32 } @llvm.arm.ldaexd(i8* %addr) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i8* +// CHECK: [[STRUCTRES:%.*]] = call { i32, i32 } @llvm.arm.ldaexd(i8* [[TMP5]]) // CHECK: [[RESHI:%.*]] = extractvalue { i32, i32 } [[STRUCTRES]], 1 // CHECK: [[RESLO:%.*]] = extractvalue { i32, i32 } [[STRUCTRES]], 0 // CHECK: [[RESHI64:%.*]] = zext i32 [[RESHI]] to i64 @@ -181,21 +163,31 @@ int test_ldaex(char *addr, long long *ad // CHECK: [[INTRES:%.*]] = or i64 [[RESHIHI]], [[RESLO64]] // CHECK: bitcast i64 [[INTRES]] to double -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[TMP5]]) // CHECK-ARM64: bitcast i64 [[INTRES]] to double sum += *__builtin_arm_ldaex((int **)addr); -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldaex.p0i32(i32* [[ADDR32]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to i32** +// CHECK: [[TMP5:%.*]] = bitcast i32** [[TMP4]] to i32* +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldaex.p0i32(i32* [[TMP5]]) // CHECK: inttoptr i32 [[INTRES]] to i32* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to i32** +// CHECK-ARM64: [[TMP5:%.*]] = bitcast i32** [[TMP4]] to i64* +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to i32* sum += __builtin_arm_ldaex((struct Simple **)addr)->a; -// CHECK: [[INTRES:%.*]] = tail call i32 @llvm.arm.ldaex.p0i32(i32* [[ADDR32]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i32* +// CHECK: [[INTRES:%.*]] = call i32 @llvm.arm.ldaex.p0i32(i32* [[TMP5]]) // CHECK: inttoptr i32 [[INTRES]] to %struct.Simple* -// CHECK-ARM64: [[INTRES:%.*]] = tail call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[ADDR64]]) +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* +// CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldaxr.p0i64(i64* [[TMP5]]) // CHECK-ARM64: inttoptr i64 [[INTRES]] to %struct.Simple* return sum; } @@ -225,27 +217,51 @@ int test_strex(char *addr) { // CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 42, i32* [[ADDR32]]) res |= __builtin_arm_strex(42, (long long *)addr); -// CHECK: call i32 @llvm.arm.strexd(i32 42, i32 0, i8* %addr) +// CHECK: store i64 42, i64* [[TMP:%.*]], align 8 +// CHECK: [[LOHI_ADDR:%.*]] = bitcast i64* [[TMP]] to { i32, i32 }* +// CHECK: [[LOHI:%.*]] = load { i32, i32 }, { i32, i32 }* [[LOHI_ADDR]] +// CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0 +// CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1 +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to i64* +// CHECK: [[TMP5:%.*]] = bitcast i64* [[TMP4]] to i8* +// CHECK: call i32 @llvm.arm.strexd(i32 [[LO]], i32 [[HI]], i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* // CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 42, i64* [[ADDR64]]) res |= __builtin_arm_strex(2.71828f, (float *)addr); -// CHECK: call i32 @llvm.arm.strex.p0i32(i32 1076754509, i32* [[ADDR32]]) - -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 1076754509, i32* [[ADDR32]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to float* +// CHECK: [[TMP5:%.*]] = bitcast float* [[TMP4]] to i32* +// CHECK: call i32 @llvm.arm.strex.p0i32(i32 1076754509, i32* [[TMP5]]) + +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to float* +// CHECK-ARM64: [[TMP5:%.*]] = bitcast float* [[TMP4]] to i32* +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i32(i64 1076754509, i32* [[TMP5]]) res |= __builtin_arm_strex(3.14159, (double *)addr); -// CHECK: call i32 @llvm.arm.strexd(i32 -266631570, i32 1074340345, i8* %addr) - -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 4614256650576692846, i64* [[ADDR64]]) +// CHECK: store double 3.141590e+00, double* [[TMP:%.*]], align 8 +// CHECK: [[LOHI_ADDR:%.*]] = bitcast double* [[TMP]] to { i32, i32 }* +// CHECK: [[LOHI:%.*]] = load { i32, i32 }, { i32, i32 }* [[LOHI_ADDR]] +// CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0 +// CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1 +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i8* +// CHECK: call i32 @llvm.arm.strexd(i32 [[LO]], i32 [[HI]], i8* [[TMP5]]) + +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 4614256650576692846, i64* [[TMP5]]) res |= __builtin_arm_strex(&var, (struct Simple **)addr); -// CHECK: [[INTVAL:%.*]] = ptrtoint i16* %var to i32 -// CHECK: call i32 @llvm.arm.strex.p0i32(i32 [[INTVAL]], i32* [[ADDR32]]) - -// CHECK-ARM64: [[INTVAL:%.*]] = ptrtoint i16* %var to i64 -// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 [[INTVAL]], i64* [[ADDR64]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i32* +// CHECK: [[INTVAL:%.*]] = ptrtoint %struct.Simple* %var to i32 +// CHECK: call i32 @llvm.arm.strex.p0i32(i32 [[INTVAL]], i32* [[TMP5]]) + +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* +// CHECK-ARM64: [[INTVAL:%.*]] = ptrtoint %struct.Simple* %var to i64 +// CHECK-ARM64: call i32 @llvm.aarch64.stxr.p0i64(i64 [[INTVAL]], i64* [[TMP5]]) return res; } @@ -275,27 +291,51 @@ int test_stlex(char *addr) { // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 42, i32* [[ADDR32]]) res |= __builtin_arm_stlex(42, (long long *)addr); -// CHECK: call i32 @llvm.arm.stlexd(i32 42, i32 0, i8* %addr) +// CHECK: store i64 42, i64* [[TMP:%.*]], align 8 +// CHECK: [[LOHI_ADDR:%.*]] = bitcast i64* [[TMP]] to { i32, i32 }* +// CHECK: [[LOHI:%.*]] = load { i32, i32 }, { i32, i32 }* [[LOHI_ADDR]] +// CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0 +// CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1 +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to i64* +// CHECK: [[TMP5:%.*]] = bitcast i64* [[TMP4]] to i8* +// CHECK: call i32 @llvm.arm.stlexd(i32 [[LO]], i32 [[HI]], i8* [[TMP5]]) // CHECK-ARM64: [[ADDR64:%.*]] = bitcast i8* %addr to i64* // CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 42, i64* [[ADDR64]]) res |= __builtin_arm_stlex(2.71828f, (float *)addr); -// CHECK: call i32 @llvm.arm.stlex.p0i32(i32 1076754509, i32* [[ADDR32]]) - -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 1076754509, i32* [[ADDR32]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to float* +// CHECK: [[TMP5:%.*]] = bitcast float* [[TMP4]] to i32* +// CHECK: call i32 @llvm.arm.stlex.p0i32(i32 1076754509, i32* [[TMP5]]) + +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to float* +// CHECK-ARM64: [[TMP5:%.*]] = bitcast float* [[TMP4]] to i32* +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i32(i64 1076754509, i32* [[TMP5]]) res |= __builtin_arm_stlex(3.14159, (double *)addr); -// CHECK: call i32 @llvm.arm.stlexd(i32 -266631570, i32 1074340345, i8* %addr) - -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 4614256650576692846, i64* [[ADDR64]]) +// CHECK: store double 3.141590e+00, double* [[TMP:%.*]], align 8 +// CHECK: [[LOHI_ADDR:%.*]] = bitcast double* [[TMP]] to { i32, i32 }* +// CHECK: [[LOHI:%.*]] = load { i32, i32 }, { i32, i32 }* [[LOHI_ADDR]] +// CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0 +// CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1 +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i8* +// CHECK: call i32 @llvm.arm.stlexd(i32 [[LO]], i32 [[HI]], i8* [[TMP5]]) + +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to double* +// CHECK-ARM64: [[TMP5:%.*]] = bitcast double* [[TMP4]] to i64* +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 4614256650576692846, i64* [[TMP5]]) res |= __builtin_arm_stlex(&var, (struct Simple **)addr); -// CHECK: [[INTVAL:%.*]] = ptrtoint i16* %var to i32 -// CHECK: call i32 @llvm.arm.stlex.p0i32(i32 [[INTVAL]], i32* [[ADDR32]]) - -// CHECK-ARM64: [[INTVAL:%.*]] = ptrtoint i16* %var to i64 -// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 [[INTVAL]], i64* [[ADDR64]]) +// CHECK: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i32* +// CHECK: [[INTVAL:%.*]] = ptrtoint %struct.Simple* %var to i32 +// CHECK: call i32 @llvm.arm.stlex.p0i32(i32 [[INTVAL]], i32* [[TMP5]]) + +// CHECK-ARM64: [[TMP4:%.*]] = bitcast i8* %addr to %struct.Simple** +// CHECK-ARM64: [[TMP5:%.*]] = bitcast %struct.Simple** [[TMP4]] to i64* +// CHECK-ARM64: [[INTVAL:%.*]] = ptrtoint %struct.Simple* %var to i64 +// CHECK-ARM64: call i32 @llvm.aarch64.stlxr.p0i64(i64 [[INTVAL]], i64* [[TMP5]]) return res; } @@ -317,7 +357,7 @@ __int128 test_ldrex_128(__int128 *addr) return __builtin_arm_ldrex(addr); // CHECK-ARM64: [[ADDR8:%.*]] = bitcast i128* %addr to i8* -// CHECK-ARM64: [[STRUCTRES:%.*]] = tail call { i64, i64 } @llvm.aarch64.ldxp(i8* [[ADDR8]]) +// CHECK-ARM64: [[STRUCTRES:%.*]] = call { i64, i64 } @llvm.aarch64.ldxp(i8* [[ADDR8]]) // CHECK-ARM64: [[RESHI:%.*]] = extractvalue { i64, i64 } [[STRUCTRES]], 1 // CHECK-ARM64: [[RESLO:%.*]] = extractvalue { i64, i64 } [[STRUCTRES]], 0 // CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128 @@ -331,11 +371,13 @@ int test_strex_128(__int128 *addr, __int // CHECK-ARM64-LABEL: @test_strex_128 return __builtin_arm_strex(val, addr); -// CHECK-ARM64: [[VALLO:%.*]] = trunc i128 %val to i64 -// CHECK-ARM64: [[VALHI128:%.*]] = lshr i128 %val, 64 -// CHECK-ARM64: [[VALHI:%.*]] = trunc i128 [[VALHI128]] to i64 +// CHECK-ARM64: store i128 %val, i128* [[TMP:%.*]], align 16 +// CHECK-ARM64: [[LOHI_ADDR:%.*]] = bitcast i128* [[TMP]] to { i64, i64 }* +// CHECK-ARM64: [[LOHI:%.*]] = load { i64, i64 }, { i64, i64 }* [[LOHI_ADDR]] +// CHECK-ARM64: [[LO:%.*]] = extractvalue { i64, i64 } [[LOHI]], 0 +// CHECK-ARM64: [[HI:%.*]] = extractvalue { i64, i64 } [[LOHI]], 1 // CHECK-ARM64: [[ADDR8:%.*]] = bitcast i128* %addr to i8* -// CHECK-ARM64: [[RES:%.*]] = tail call i32 @llvm.aarch64.stxp(i64 [[VALLO]], i64 [[VALHI]], i8* [[ADDR8]]) +// CHECK-ARM64: call i32 @llvm.aarch64.stxp(i64 [[LO]], i64 [[HI]], i8* [[ADDR8]]) } __int128 test_ldaex_128(__int128 *addr) { @@ -343,7 +385,7 @@ __int128 test_ldaex_128(__int128 *addr) return __builtin_arm_ldaex(addr); // CHECK-ARM64: [[ADDR8:%.*]] = bitcast i128* %addr to i8* -// CHECK-ARM64: [[STRUCTRES:%.*]] = tail call { i64, i64 } @llvm.aarch64.ldaxp(i8* [[ADDR8]]) +// CHECK-ARM64: [[STRUCTRES:%.*]] = call { i64, i64 } @llvm.aarch64.ldaxp(i8* [[ADDR8]]) // CHECK-ARM64: [[RESHI:%.*]] = extractvalue { i64, i64 } [[STRUCTRES]], 1 // CHECK-ARM64: [[RESLO:%.*]] = extractvalue { i64, i64 } [[STRUCTRES]], 0 // CHECK-ARM64: [[RESHI64:%.*]] = zext i64 [[RESHI]] to i128 @@ -357,11 +399,13 @@ int test_stlex_128(__int128 *addr, __int // CHECK-ARM64-LABEL: @test_stlex_128 return __builtin_arm_stlex(val, addr); -// CHECK-ARM64: [[VALLO:%.*]] = trunc i128 %val to i64 -// CHECK-ARM64: [[VALHI128:%.*]] = lshr i128 %val, 64 -// CHECK-ARM64: [[VALHI:%.*]] = trunc i128 [[VALHI128]] to i64 +// CHECK-ARM64: store i128 %val, i128* [[TMP:%.*]], align 16 +// CHECK-ARM64: [[LOHI_ADDR:%.*]] = bitcast i128* [[TMP]] to { i64, i64 }* +// CHECK-ARM64: [[LOHI:%.*]] = load { i64, i64 }, { i64, i64 }* [[LOHI_ADDR]] +// CHECK-ARM64: [[LO:%.*]] = extractvalue { i64, i64 } [[LOHI]], 0 +// CHECK-ARM64: [[HI:%.*]] = extractvalue { i64, i64 } [[LOHI]], 1 // CHECK-ARM64: [[ADDR8:%.*]] = bitcast i128* %addr to i8* -// CHECK-ARM64: [[RES:%.*]] = tail call i32 @llvm.aarch64.stlxp(i64 [[VALLO]], i64 [[VALHI]], i8* [[ADDR8]]) +// CHECK-ARM64: [[RES:%.*]] = call i32 @llvm.aarch64.stlxp(i64 [[LO]], i64 [[HI]], i8* [[ADDR8]]) } #endif
Modified: cfe/trunk/test/CodeGen/builtins-arm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm.c?rev=263048&r1=263047&r2=263048&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/builtins-arm.c (original) +++ cfe/trunk/test/CodeGen/builtins-arm.c Wed Mar 9 12:54:42 2016 @@ -1,5 +1,4 @@ -// REQUIRES: arm-registered-target -// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -O3 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -Wall -Werror -triple thumbv7-eabi -target-cpu cortex-a8 -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s void *f0() { @@ -87,14 +86,14 @@ void prefetch(int i) { unsigned mrc() { // CHECK: define i32 @mrc() - // CHECK: [[R:%.*]] = {{.*}} call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) + // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3) // CHECK-NEXT: ret i32 [[R]] return __builtin_arm_mrc(15, 0, 13, 0, 3); } unsigned mrc2() { // CHECK: define i32 @mrc2() - // CHECK: [[R:%.*]] = {{.*}} call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3) + // CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3) // CHECK-NEXT: ret i32 [[R]] return __builtin_arm_mrc2(15, 0, 13, 0, 3); } @@ -124,40 +123,40 @@ void mcrr2(unsigned a, unsigned b) { } unsigned rsr() { - // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i32 @llvm.read_register.i32(metadata !7) + // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i32 @llvm.read_register.i32(metadata ![[M0:.*]]) // CHECK-NEXT: ret i32 [[V0]] return __builtin_arm_rsr("cp1:2:c3:c4:5"); } unsigned long long rsr64() { - // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i64 @llvm.read_register.i64(metadata !8) + // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M1:.*]]) // CHECK-NEXT: ret i64 [[V0]] return __builtin_arm_rsr64("cp1:2:c3"); } void *rsrp() { - // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i32 @llvm.read_register.i32(metadata !9) + // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i32 @llvm.read_register.i32(metadata ![[M2:.*]]) // CHECK-NEXT: [[V1:[%A-Za-z0-9.]+]] = inttoptr i32 [[V0]] to i8* // CHECK-NEXT: ret i8* [[V1]] return __builtin_arm_rsrp("sysreg"); } void wsr(unsigned v) { - // CHECK: call void @llvm.write_register.i32(metadata !7, i32 %v) + // CHECK: call void @llvm.write_register.i32(metadata ![[M0]], i32 %v) __builtin_arm_wsr("cp1:2:c3:c4:5", v); } void wsr64(unsigned long long v) { - // CHECK: call void @llvm.write_register.i64(metadata !8, i64 %v) + // CHECK: call void @llvm.write_register.i64(metadata ![[M1]], i64 %v) __builtin_arm_wsr64("cp1:2:c3", v); } void wsrp(void *v) { // CHECK: [[V0:[%A-Za-z0-9.]+]] = ptrtoint i8* %v to i32 - // CHECK-NEXT: call void @llvm.write_register.i32(metadata !9, i32 [[V0]]) + // CHECK-NEXT: call void @llvm.write_register.i32(metadata ![[M2]], i32 [[V0]]) __builtin_arm_wsrp("sysreg", v); } -// CHECK: !7 = !{!"cp1:2:c3:c4:5"} -// CHECK: !8 = !{!"cp1:2:c3"} -// CHECK: !9 = !{!"sysreg"} +// CHECK: ![[M0]] = !{!"cp1:2:c3:c4:5"} +// CHECK: ![[M1]] = !{!"cp1:2:c3"} +// CHECK: ![[M2]] = !{!"sysreg"} Modified: cfe/trunk/test/CodeGen/builtins-arm64.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-arm64.c?rev=263048&r1=263047&r2=263048&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/builtins-arm64.c (original) +++ cfe/trunk/test/CodeGen/builtins-arm64.c Wed Mar 9 12:54:42 2016 @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple arm64-apple-ios -O3 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple arm64-apple-ios -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s void f0(void *a, void *b) { __clear_cache(a,b); @@ -50,7 +50,7 @@ void prefetch() { } unsigned rsr() { - // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) + // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) // CHECK-NEXT: trunc i64 [[V0]] to i32 return __builtin_arm_rsr("1:2:3:4:5"); } @@ -61,7 +61,7 @@ unsigned long rsr64() { } void *rsrp() { - // CHECK: [[V0:[%A-Za-z0-9.]+]] = {{.*}} call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) + // CHECK: [[V0:[%A-Za-z0-9.]+]] = call i64 @llvm.read_register.i64(metadata ![[M0:[0-9]]]) // CHECK-NEXT: inttoptr i64 [[V0]] to i8* return __builtin_arm_rsrp("1:2:3:4:5"); } Modified: cfe/trunk/test/CodeGen/fp128_complex.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/fp128_complex.c?rev=263048&r1=263047&r2=263048&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/fp128_complex.c (original) +++ cfe/trunk/test/CodeGen/fp128_complex.c Wed Mar 9 12:54:42 2016 @@ -1,9 +1,9 @@ -// RUN: %clang -target aarch64-linux-gnuabi %s -O3 -S -emit-llvm -o - | FileCheck %s +// RUN: %clang -target aarch64-linux-gnuabi %s -S -emit-llvm -o - | FileCheck %s _Complex long double a, b, c, d; void test_fp128_compound_assign(void) { - // CHECK: tail call { fp128, fp128 } @__multc3 + // CHECK: call { fp128, fp128 } @__multc3 a *= b; - // CHECK: tail call { fp128, fp128 } @__divtc3 + // CHECK: call { fp128, fp128 } @__divtc3 c /= d; } Modified: cfe/trunk/test/CodeGen/neon-immediate-ubsan.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/neon-immediate-ubsan.c?rev=263048&r1=263047&r2=263048&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/neon-immediate-ubsan.c (original) +++ cfe/trunk/test/CodeGen/neon-immediate-ubsan.c Wed Mar 9 12:54:42 2016 @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 -triple armv7s-linux-gnu -emit-llvm -O1 -o - %s \ +// RUN: %clang_cc1 -triple armv7s-linux-gnu -emit-llvm -o - %s \ // RUN: -target-feature +neon -target-cpu cortex-a8 \ // RUN: -fsanitize=signed-integer-overflow \ // RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=ARMV7 -// RUN: %clang_cc1 -triple aarch64-unknown-unknown -emit-llvm -O1 -o - %s \ +// RUN: %clang_cc1 -triple aarch64-unknown-unknown -emit-llvm -o - %s \ // RUN: -target-feature +neon -target-cpu cortex-a53 \ // RUN: -fsanitize=signed-integer-overflow \ // RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=AARCH64 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
