Jim wrote:well yeah - but include-makefile supplies ,-include,$(m), for the $(1) and $(2) in _include-makefile...
Well that's an ugly thing :)
The amount of hairy code in a system stays constant :-) Although the definition may be ugly, it's usage is pretty simple:
$(call include-makefile,my-makefile)
# $(1) is the include method, either "include" or "-include" # $(2) is the file to be included
> $(1) $(2)
So that statement is actually include - but that include is performed when $(eval) is done, and not being entirely sure of the sequence of operations, is $(eval) done before included makefile dependancies are checked? and even if it were, there's still no way to restart and throw out previously included garbage.
Really, if any makefile is modified which has been included, the entire make state needs to be trashed and repeat after processing command arguments.
within the macro will include a makefile on the fly eh? but sometime after all the already included files are validated for rules, no?
I'm not sure what you're asking. Can you elaborate, please?
And I think that won't help with reload...
Actually, correct me if I'm wrong. It sounds like you want to count the number of times the makefiles include another makefile. If so, that logic can be stuck into the _include-makefile macro.
No actually the tick was just a uniquneness marker for that example, and so I could figure out why the real code wasn't working... then I found out that for as many levels as you include, the data is minus one state from correct... (something like that)
Noel
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