> 2021-03-03 Bruno Haible <br...@clisp.org> > > asyncsafe-spin, simple-atomic: Add support for tcc.
This doesn't work for tcc/x86, because in this configuration the compiler does not know about the 'mfence' instruction. 2021-03-03 Bruno Haible <br...@clisp.org> asyncsafe-spin, simple-atomic: Add support for tcc/x86. * lib/asyncsafe-spin.c (memory_barrier): With tcc/x86, don't use the 'mfence' instruction. * lib/simple-atomic.c (memory_barrier): Likewise. diff --git a/lib/asyncsafe-spin.c b/lib/asyncsafe-spin.c index cece623..d0cdb39 100644 --- a/lib/asyncsafe-spin.c +++ b/lib/asyncsafe-spin.c @@ -202,7 +202,12 @@ memory_barrier (void) { # if defined __GNUC__ || defined __clang__ || __SUNPRO_C >= 0x590 || defined __TINYC__ # if defined __i386 || defined __x86_64__ +# if defined __TINYC__ && defined __i386 + /* Cannot use the SSE instruction "mfence" with this compiler. */ + asm volatile ("lock orl $0,(%esp)"); +# else asm volatile ("mfence"); +# endif # endif # if defined __sparc asm volatile ("membar 2"); diff --git a/lib/simple-atomic.c b/lib/simple-atomic.c index 4d5a0d8..7c4f7e9 100644 --- a/lib/simple-atomic.c +++ b/lib/simple-atomic.c @@ -197,7 +197,12 @@ memory_barrier (void) { # if defined __GNUC__ || defined __clang__ || __SUNPRO_C >= 0x590 || defined __TINYC__ # if defined __i386 || defined __x86_64__ +# if defined __TINYC__ && defined __i386 + /* Cannot use the SSE instruction "mfence" with this compiler. */ + asm volatile ("lock orl $0,(%esp)"); +# else asm volatile ("mfence"); +# endif # endif # if defined __sparc asm volatile ("membar 2");