https://sourceware.org/bugzilla/show_bug.cgi?id=24538
Christophe Lyon <clyon at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |clyon at gcc dot gnu.org
--- Comment #10 from Christophe Lyon <clyon at gcc dot gnu.org> ---
(In reply to [email protected] from comment #8)
> The master branch has been updated by Nick Clifton <[email protected]>:
>
> https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;
> h=35015cd193be5e603ed31c14472d2d9d17e14e7a
>
> commit 35015cd193be5e603ed31c14472d2d9d17e14e7a
> Author: Nick Clifton <[email protected]>
> Date: Tue May 14 12:42:02 2019 +0100
>
> Fix illegal memory access triggered when attempting to assemble a bogus
> i386 source file.
>
> PR 24538
> * config/tc-i386-intel.c (i386_intel_simplify_register): Reject
> illegal register numbers.
Hi Nick,
After this commit, I'm seeing:
UNRESOLVED: objcopy (verilog data width)
The error message is:
Assembler messages:
Error: can't open /testsuite/binutils-all/verilogtest.s for reading: No such
file or directory
assembler exited with status 1
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