https://sourceware.org/bugzilla/show_bug.cgi?id=23647
--- Comment #2 from Johan Dahlberg <johan.dahlberg at electrumab dot se> --- Hello Christina, Thank you for trying to verify my report! I tested this under both Windows and Linux and both yielded the same result. There was a bug, but not in the GNU assembler tool. I found that the assembler source code from NXP included a line stating the architecture: ".arch armv7-m", which I had not noticed. After removing that line correct machine code was produced! I am sorry for the incorrect bug report. Best regards, /Johan Dahlberg -- Johan Dahlberg Produktutveckling / Product Development ………………………………………………………….. Electrum Automation AB Industrivägen 8, 901 30 Umeå, SWEDEN Tel +46 (0)90-184558 Fax +46 (0)90-144078 www.electrumab.se > -----Ursprungligt meddelande----- > Från: tnfchris at sourceware dot org <sourceware-bugzi...@sourceware.org> > Skickat: den 20 september 2018 14:25 > Till: Johan Dahlberg <johan.dahlb...@electrumab.se> > Ämne: [Bug gas/23647] ARM: Incorrect optimization of pseudo instruxtion ldr > rx,=0 for -mcpu=cortex-m0plus > > https://sourceware.org/bugzilla/show_bug.cgi?id=23647 > > Tamar Christina <tnfchris at sourceware dot org> changed: > > What |Removed |Added > ---------------------------------------------------------------------------- > CC| |tnfchris at sourceware dot > org > > --- Comment #1 from Tamar Christina <tnfchris at sourceware dot org> --- Hi > Johan, > > I don't seem to be able to reproduce this, do you happen to pass any other > command-line to the compiler or in-line directives to the assembly file? > > The only way I get it to produce the wrong code is by specifying `- > march=armv7-m` which would be incorrect for the Cortex-M0+ anyway. > > I've tried both with normal upstream GCC, gas and with the Arm Embedded > 2018-q2 update. > > /d/t/t/arm-embeddded ./gcc-arm-none-eabi-7-2018-q2-update/bin/arm- > none-eabi-gcc > test.s -c -o a.out -mcpu=cortex-m0plus; > ./gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-objdump -dr > a.out > > a.out: file format elf32-littlearm > > > Disassembly of section .text: > > 00000000 <Reset_Handler>: > 0: b672 cpsid i > 2: 4901 ldr r1, [pc, #4] ; (8 <Reset_Handler+0x8>) > 4: 4a00 ldr r2, [pc, #0] ; (8 <Reset_Handler+0x8>) > 6: 4b00 ldr r3, [pc, #0] ; (8 <Reset_Handler+0x8>) > 8: 00000000 .word 0x00000000 > > -- > You are receiving this mail because: > You reported the bug. -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
