https://sourceware.org/bugzilla/show_bug.cgi?id=20030
Bug ID: 20030
Summary: STM32L4XX : --fix-stm32l4xx-629360 fails to create
vldm/vpop veneers for double-precision registers
Product: binutils
Version: 2.27 (HEAD)
Status: NEW
Severity: normal
Priority: P2
Component: ld
Assignee: unassigned at sourceware dot org
Reporter: christophe.monat at st dot com
Target Milestone: ---
Created attachment 9228
--> https://sourceware.org/bugzilla/attachment.cgi?id=9228&action=edit
Sequence of vldm/vpop with dp registers that should be patched by the linker.
The --fix-stm32l4xx-629360 ld option should create veneers for vldm/vpop
instructions when the number of words transferred is greater than 8.
This is the case for vldm/vpop when single precision register are used (eg in
the s0-s31 range), but not when the aliases to double precision registers are
used (eg the d0-d15 corresponding to s0-s31).
It turns out that, despite the fact that there is not much use for dp registers
in fpv4-sp-d16 mode, gcc uses dp sequences for generating its save/restore
sequences.
The original STM32L4XX hardware bug work-around fix did not account for that
case, an oversight.
To reproduce, use the attached .s file:
$ arm-none-eabi-as -EL -mcpu=cortex-m4 -mfpu=fpv4-sp-d16
stm32l4xx-fix-vldm-dp.s -o stm32l4xx-fix-vldm-dp.o
$ arm-none-eabi-ld -EL --fix-stm32l4xx-629360 -Ttext=0x8000
stm32l4xx-fix-vldm-dp.o -o stm32l4xx-fix-vldm-dp
$ arm-none-eabi-objdump -d stm32l4xx-fix-vldm-dp | grep veneer
is empty, this should not be the case since all instructions used are subject
to the bug.
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