https://sourceware.org/bugzilla/show_bug.cgi?id=19159
Bug ID: 19159
Summary: GNURL78:Incorrect disassembler output generated by
objdump for base addressing using DE register.
Product: binutils
Version: 2.25
Status: NEW
Severity: normal
Priority: P2
Component: binutils
Assignee: unassigned at sourceware dot org
Reporter: vinay.g at kpit dot com
Target Milestone: ---
The RL78 toolchain does not generate correct instructions with below testcase.
The instruction generation in the list file is as expected. However, the
objdump shows incorrect disassembly being generated. For index addressing
instructions the list file displays "a, [de+0]", while the object dump shows
only "a, [de]" -> Here is "+ 0" is omitted by the toolchain.
Below testcase is for 'mov' and 'movw' instructions. Similar behaviour is also
observed with 'xch' instruction.
// test.s
.text
mov a, [de]
mov a, [de + 0]
mov a, [de + 1]
mov [de], a
mov [de + 0], a
mov [de + 1], a
movw ax, [de]
movw ax, [de + 0]
movw ax, [de + 1]
.end
$rl78-elf-as test.s -o test.o -aln=test.lst
$rl78-elf-objdump -d test.o
00000000 <.text>:
0: 89 mov a, [de]
1: 8a 00 mov a, [de] ---> expected "mov a, [de+0]"
3: 8a 01 mov a, [de+1]
5: 99 mov [de], a
6: 9a 00 mov [de], a ---> expected "mov [de+0], a"
8: 9a 01 mov [de+1], a
a: a9 movw ax, [de]
b: aa 00 movw ax, [de] ---> expected "movw ax, [de+0]"
d: aa 01 movw ax, [de+1]
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