https://sourceware.org/bugzilla/show_bug.cgi?id=19158
Bug ID: 19158
Summary: GNURL78: Incorrect disassembler output generated by
objdump for SFR registers.
Product: binutils
Version: 2.25
Status: NEW
Severity: critical
Priority: P2
Component: binutils
Assignee: unassigned at sourceware dot org
Reporter: vinay.g at kpit dot com
Target Milestone: ---
SFR registers are not visble in the disassembly generated by objdump utility.
//test.s
.text
.set sfr, 0xffff8
mov a, sfr
mov sfr, a
mov sfr, #123
xch a, sfr
.set sfrp, 0xffff8
movw ax, sfrp
movw sfrp, ax
movw sfrp, #0x1234
$rl78-elf-as test.s -o test.o -aln=test.lst
$rl78-elf-objdump -d test.o
Disassembly of section .text:
00000000 <.text>:
0: 8e f8 mov a, 0xffff8
2: 9e f8 mov 0xffff8, a
4: ce f8 7b mov 0xffff8, #123
7: 61 ab fa xch a, 0xffffa
a: ae f8 movw ax, sp
c: be f8 movw sp, ax
e: cb f8 34 12 movw 0xffff8, #0x1234
Expected
Disassembly of section .text:
00000000 <.text>:
0: 8e f8 mov a, spl
2: 9e f8 mov spl, a
4: ce f8 7b mov spl, #123
7: 61 ab fa xch a, psw
a: ae f8 movw ax, sp
c: be f8 movw sp, ax
e: cb f8 34 12 movw sp, #0x1234
For example,
the instruction "mov 0xffffa, a" was disassembled as "mov 0xffffa, a", here
"0xffffa" should have been replaced by "psw".
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