https://sourceware.org/bugzilla/show_bug.cgi?id=18500
--- Comment #8 from Nick Clifton <nickc at redhat dot com> --- (In reply to Alessandro Marzocchi from comment #7) > 2) I took that idea from ARM specs: A good point. I rescind my earlier comment on this point. > By the way... what is the correct way to load 1.0 in a double register? I > tried this but it gives an error: > .arm > .syntax unified > .fpu vfpv3 > vmov d0,#0x3f800000 You need to explicitly state the size of the floating point being stored. IE: vmov.f64 d0,#0x3f800000 or: vmov.f64 d0, 1.0 Note - when this instruction is disassembled via objdump it will be displayed as: eeb70b00 vmov.f64 d0, #112 ; 0x70 Which is not very helpful. Ideally objdump should decode the 112 value and display the floating point equivalent. If you do this by hand by the way you will find that the actual bit pattern being stored into the d0 register is: 0x3ff0000000000000 which is not quite the same as the 0x3f80000 value that was provided in the assembler. This is because the input value (0x3f80000) is treated as a 32-bit floating point bit pattern, but the value stored in d0 is a 64-bit floating point value. Anyway, I have now checked your patch in. I made a few small modifications however: * I fixed the test cases so that they would work with arm-wince and arm-aout targets. I also updated the names of the tests so that they reflect the vfp version being tested. * I added code to handle bignum floating point constants. * I added changelog entries for the patch and the new tests. Cheers Nick -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org https://lists.gnu.org/mailman/listinfo/bug-binutils
