On 01/20/2017 02:38 PM, Douglas Eadline wrote:
That is related to the end Moores Law. The shrinking of the transistor
stopped increasing CPU speed in 2005 which brought about the release of
multi core CPUS the fastest CPU ever release was at 4.5GHz in 2004. The
newer i5 and i7 are quite a bit slower per core than the single core from
the early 2000s by almost half. Any single threaded algorithm today will
suffer as core counts increase and frequency decreases. This is creating
a very strong market for technologies like the fpga that accelerate single
threaded logic operations. Just look at a CPU history chart we are
slowing down the core substantially making multithread a requirement for
the future and yet we failing to train programmers with the skills for
multithread.
Learn/teach Julia
+1 for this. Julia is an excellent language.
(shameless off-topic plug) https://github.com/joelandman/nyltiq-base is
an initial step at building modern analytical toolchain for people to
use great tools like Julia/IJulia (and many others).
As for FPGA ... sorta like the joke about Gallium Arsenide being the
material of the future, and always will be (think about it) ... I've had
the same sense of FPGAs. Mostly because of a lack of real standards for
them, costly, non-portable, non-open development tools, etc. These
problems may eventually be solved. But this is what I said 14 years ago
when we started building accelerators.
Joe's first rule of market dominance: target ubiquity. GPUs have done
a tremendous job there. FPGA, not so much.
But the on-topic complaint is that programmers are not being trained on
multithreading. Doug's point was that tools like julia enable you to
avoid worrying about that in many cases, as it does the right thing.
OpenMP and other tools enable you to build multi-threaded/parallel code
fairly easily if you prefer to stay with C/C++, Fortran, others.
This said, its hard enough now for developers without much experience to
properly reason about their code and understand how to
multi-thread/parallelize. I've seen people gleefully write on HN and
other places how they chase lock-free data structure development, though
this is rarely what they really need.
Always start with an understanding of where your code spends time, why
it spends time there, and then see if you can move upwards from there to
leverage multi-threading/parallelization.
Julia makes this quite easy BTW. Its built into the (macro) language.
--
Doug
Scott
Sent via the Samsung Galaxy S7, an AT&T 4G LTE smartphone
-------- Original message --------
From: Lukasz Salwinski <luk...@mbi.ucla.edu>
Date: 1/19/17 8:43 PM (GMT-06:00)
To: beowulf@beowulf.org
Subject: Re: [Beowulf] Mobos for portable use
On 01/19/2017 02:09 PM, Lux, Jim (337C) wrote:
-----Original Message-----
From: Beowulf [mailto:beowulf-boun...@beowulf.org] On Behalf Of Andrew
M.A. Cater
Sent: Thursday, January 19, 2017 12:49 PM
To: beowulf@beowulf.org
Subject: Re: [Beowulf] Mobos for portable use
[...]
(I just found that at least a while ago, Xilinx supported clusters for
some of their design tools.. Since right now the design I'm working
with takes an hour to synthesize (on a single machine), I'm going to
look further - it has been a real rate limiter in the lab, because it
makes the test, new design, load, test cycle a lot longer.)
it looks like current (vivado 16.4) synthesis program hasn't been
parallelized - it's strictly single threaded and so uses just one
core... :o/ I've recently benchmarked a few i5 & i7 workstations
- there seem to be very little differences (maybe 10-20%) between
CPUs released over last ~4-5 years :o/
lukasz
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UCLA, Los Angeles EMAIL: luk...@mbi.ucla.edu
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