On 01/19/2017 06:55 PM, Hamilton, Scott wrote:
That is related to the end Moores Law. The shrinking of the transistor stopped
increasing CPU speed in 2005 which brought about the release of multi core CPUS
the fastest CPU ever release was at 4.5GHz in 2004. The newer i5 and i7 are
quite
a bit slower per core than the single core from the early 2000s by almost half.
Any single threaded algorithm today will suffer as core counts increase and
frequency decreases.
I hoped cpu designers were able to squeeze some extra performance out of a
single
core even when the clock stays the same but, apparently, it was too optimistic
:o/
This is creating a very strong market for technologies like the fpga that
accelerate
single threaded logic operations. Just look at a CPUhistory chart we are
slowing
down the core substantially making multithread arequirement for the future and
yet
we failing to train programmers with the
skills for multithread.
same with FPGAs - it's way more exotic than writing a parallel code. add to this
a culture shock when coming from FOSS direction - constant references to
IP/intellectual property makes many (myself included) cringe; until very
recently
(half a year, maybe?) the debugging module within (otherwise free) Xilinx
development
toolchain had to be bought for $$$. These are exact opposite to what FOSS
community
has been used to (but quite normal within hardware engineer crowd). I guess,
some of
the changes are courtesy of the purchase of Altera by Intel. hopefully it will
bring
these two groups closer...
lukasz
Scott
Sent via the Samsung Galaxy S7, an AT&T 4G LTE smartphone
-------- Original message --------
From: Lukasz Salwinski <luk...@mbi.ucla.edu>
Date: 1/19/17 8:43 PM (GMT-06:00)
To: beowulf@beowulf.org
Subject: Re: [Beowulf] Mobos for portable use
On 01/19/2017 02:09 PM, Lux, Jim (337C) wrote:
-----Original Message-----
From: Beowulf [mailto:beowulf-boun...@beowulf.org] On Behalf Of Andrew M.A.
Cater
Sent: Thursday, January 19, 2017 12:49 PM
To: beowulf@beowulf.org
Subject: Re: [Beowulf] Mobos for portable use
[...]
(I just found that at least a while ago, Xilinx supported clusters for
some of their design tools.. Since right now the design I'm working
with takes an hour to synthesize (on a single machine), I'm going to
look further - it has been a real rate limiter in the lab, because it
makes the test, new design, load, test cycle a lot longer.)
it looks like current (vivado 16.4) synthesis program hasn't been
parallelized - it's strictly single threaded and so uses just one
core... :o/ I've recently benchmarked a few i5 & i7 workstations
- there seem to be very little differences (maybe 10-20%) between
CPUs released over last ~4-5 years :o/
lukasz
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UCLA-DOE Institute FAX: 310-206-3914
UCLA, Los Angeles EMAIL: luk...@mbi.ucla.edu
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