On Mon, Aug 24, 2009 at 08:29:47AM +0200, Kilian CAVALOTTI wrote: > > On Fri, Aug 21, 2009 at 12:35 AM, <richard.wa...@comcast.net> wrote: > > I would also like to know how Intel and > > AMD are disabling/degrading the cores. They very like have built > > in circuits that they can "burn out" to ensure physical incapacity. Still, > > perhaps it is done another way. > > At least for AMD's Phenom II X3, re-enabling a disabled core is a > simple matter of changing a BIOS setting. See > http://www.tomshardware.com/news/amd-phenom-cpu,7080.html
Has anyone tinkered with disabling one core at a time and benchmarking the remaining set of cores with various parallel tests. I suspect that there is some asymmetry that might color processor affinity if the locality of the disabled core can be exposed. Things like interrupt servicing, cache line interactions, TLB state and IO channel latency come to mind. I guess AMD could just tell us.... -- T o m M i t c h e l l Found me a new hat, now what? _______________________________________________ Beowulf mailing list, Beowulf@beowulf.org sponsored by Penguin Computing To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf