The SiCortex systems are clusters of 6-core SMPs. There is no load/store
access to memory on other nodes, although the interconnect is fast enough to
make software access to remote memory quite interesting.
interesting way to put it, since competing interconnects are at least
as fast (I'm thinking about the usual IB claim of ~1 us latency).
I've been coding shmem and GASnet implementations for the SiCortex
interconnect recently, and on the older 500 MHz systems a "put" takes about
800 ns and a "get" takes a little under 3 microseconds before any particular
so the 800ns put is half RTT for two nodes doing ping-pong puts?
On the remote-paging side, I put together a prototype that gets about 2
GB/sec and 64K page fault latencies under 100 microseconds, again, not
optimized.
ouch. do you know how much of that time is due to slow MMU interaction?
(at 2 GB/s, the wiretime for 64k should be 33 us, if I calculate correctly)
after all. I am kind of amused by all the press and angst about "multicore",
well, academics need _something_ to motivate grants, and the gov isn't
likley to support all the nation's CS depts on gaming research ;)
also, I suspect intel and perhaps sun have encouraged the brouhaha.
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