Looks like everyone is talking about it even Jason:
https://www.youtube.com/watch?v=9MJl7gCTAcM

https://www.tomshardware.com/news/beaglev-riscv-announced

https://blog.adafruit.com/2021/01/13/the-risc-v-powered-beaglev-board-announced-riscv-beagleboardorg/

https://arstechnica.com/gadgets/2021/01/seeed-and-beagleboard-team-up-to-provide-a-new-risc-v-based-linux-pc/

Jon

On Wed, Jan 13, 2021 at 7:05 AM jonnymo <[email protected]> wrote:

> This looks like another effort to use a RISC-V processor on a board so it
> will be different than an ARM core.
>
> Jon
>
> On Wednesday, January 13, 2021, [email protected] <
> [email protected]> wrote:
>
>>
>> I got a mail message from seeed that introduced the BeagleV.
>>
>> Although I am very hopeful for a complete opensource hardware and
>> software platform, I noticed that the pin-layout and the compatibility of
>> the ARM-Beagleboards has been abandoned.
>>
>> I also noticed on the specs that the GPIO pins could be used for any kind
>> of communication protocol, be it UART, SPI, SDIO etc.
>>
>> I am currently using 3 UART ports on a BeagleBone to communicate with
>> some peripherals.
>>
>> Would that still be possible in the new design?
>>
>> I also noted the RS485, or Canbus was not described in the IO.
>>
>> Can anyone involved in the design comment on these observations?
>> (Why abandon the old pin layout, how to implement three UARTS or 2 I2C's,
>> and why no CANBus  availability)
>>
>> Kind Regards
>> Johan Henselmans
>>
>>
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>>
>

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