Hi Mark,

> On Tue, Mar 10, 2026 at 12:18 AM Mark Kettenis <[email protected]>
wrote:
> > rk3528_reset: 0x00000064
> > rk3528_reset: 0x00000062
> > rk3528_reset: 0x00000064
> > rk3528_reset: 0x00000062
>
> Some resets missing as well from rkclock(4).

I've added the missing resets (please find the diffs below).
As a reference, I used the following two files from the Linux
source tree:

https://github.com/torvalds/linux/blob/8004279c41adf3238ba71931219205cd1f59343b/include/dt-bindings/reset/rockchip%2Crk3528-cru.h#L109

https://github.com/torvalds/linux/blob/8004279c41adf3238ba71931219205cd1f59343b/drivers/clk/rockchip/rst-rk3528.c#L138

Index: sys/dev/fdt/rkclock_clocks.h
===================================================================
RCS file: /cvs/src/sys/dev/fdt/rkclock_clocks.h,v
retrieving revision 1.67
diff -u -p -u -w -r1.67 rkclock_clocks.h
--- sys/dev/fdt/rkclock_clocks.h        11 Mar 2026 16:32:42 -0000      1.67
+++ sys/dev/fdt/rkclock_clocks.h        12 Mar 2026 20:10:24 -0000
@@ -313,6 +313,10 @@
 #define RK3528_SRST_B_EMMC             68
 #define RK3528_SRST_T_EMMC             69
 #define RK3528_SRST_A_MAC              97
+#define RK3528_SRST_P_PCIE             98
+#define RK3528_SRST_PCIE_PIPE_PHY      99
+#define RK3528_SRST_PCIE_POWER_UP      100
+#define RK3528_SRST_P_PCIE_PHY         101
 #define RK3528_SRST_H_SDMMC0           189

 /*
Index: sys/dev/fdt/rkclock.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/rkclock.c,v
retrieving revision 1.95
diff -u -p -u -w -r1.95 rkclock.c
--- sys/dev/fdt/rkclock.c       11 Mar 2026 16:32:42 -0000      1.95
+++ sys/dev/fdt/rkclock.c       12 Mar 2026 20:10:24 -0000
@@ -3359,6 +3359,22 @@ rk3528_reset(void *cookie, uint32_t *cel
                reg = RK3528_CRU_SOFTRST_CON(28);
                bit = 5;
                break;
+       case RK3528_SRST_P_PCIE:
+               reg = RK3528_CRU_SOFTRST_CON(30);
+               bit = 1;
+               break;
+       case RK3528_SRST_PCIE_PIPE_PHY:
+               reg = RK3528_CRU_SOFTRST_CON(30);
+               bit = 2;
+               break;
+       case RK3528_SRST_PCIE_POWER_UP:
+               reg = RK3528_CRU_SOFTRST_CON(30);
+               bit = 3;
+               break;
+       case RK3528_SRST_P_PCIE_PHY:
+               reg = RK3528_CRU_SOFTRST_CON(30);
+               bit = 6;
+               break;
        case RK3528_SRST_H_SDMMC0:
                reg = RK3528_CRU_SOFTRST_CON(42);
                bit = 9;

After applying these changes I rebuilt the kernel,
and the WAN port now works correctly (please see the dmesg output below).

Would it be possible to merge these diffs into the source tree?

>> OpenBSD/arm64 BOOTAA64 1.24
boot>
booting sd0a:/bsd: 12741388+3005696+324264+864680
[1114860+91+1404552+902938]=0x1666048
[ using 3423224 bytes of bsd ELF symbol table ]
Copyright (c) 1982, 1986, 1989, 1991, 1993
        The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2026 OpenBSD. All rights reserved.
https://www.OpenBSD.org

OpenBSD 7.9-beta (GENERIC.MP) #1: Thu Mar 12 22:44:23 +04 2026
    [email protected]:/usr/src/sys/arch/arm64/compile/GENERIC.MP
real mem  = 4223954944 (4028MB)
avail mem = 4005896192 (3820MB)
random: good seed from bootblocks
mainbus0 at root: Radxa E20C
psci0 at mainbus0: PSCI 1.1, SMCCC 1.2, SYSTEM_SUSPEND
efi0 at mainbus0: UEFI 2.11
efi0: Das U-Boot rev 0x20260400
smbios0 at efi0: SMBIOS 3.7.0
smbios0: vendor U-Boot version "2026.04-rc4-00180-g1e240f7206fc-dirty" date
04/01/2026
smbios0: radxa Radxa E20C
cpu0 at mainbus0 mpidr 0: ARM Cortex-A53 r0p4
cpu0: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu0: 256KB 64b/line 16-way L2 cache
cpu0: CRC32,SHA2,SHA1,AES+PMULL,ASID16
cpu1 at mainbus0 mpidr 1: ARM Cortex-A53 r0p4
cpu1: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu1: 256KB 64b/line 16-way L2 cache
cpu2 at mainbus0 mpidr 2: ARM Cortex-A53 r0p4
cpu2: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu2: 256KB 64b/line 16-way L2 cache
cpu3 at mainbus0 mpidr 3: ARM Cortex-A53 r0p4
cpu3: 32KB 64b/line 2-way L1 VIPT I-cache, 32KB 64b/line 4-way L1 D-cache
cpu3: 256KB 64b/line 16-way L2 cache
scmi0 at mainbus0: SCMI 2.0
"shmem" at mainbus0 not configured
apm0 at mainbus0
rkpinctrl0 at mainbus0: "pinctrl"
rkgpio0 at rkpinctrl0
rkgpio1 at rkpinctrl0
rkgpio2 at rkpinctrl0
rkgpio3 at rkpinctrl0
rkgpio4 at rkpinctrl0
pwmreg0 at mainbus0
pwmreg1 at mainbus0
"fit-images" at mainbus0 not configured
"firmware" at mainbus0 not configured
"opp-table-cpu" at mainbus0 not configured
"opp-table-gpu" at mainbus0 not configured
agtimer0 at mainbus0: 24000 kHz
"clock-xin24m" at mainbus0 not configured
"clock-gmac50m" at mainbus0 not configured
simplebus0 at mainbus0: "soc"
ampintc0 at simplebus0 nirq 224, ncpu 4 ipi 0: "interrupt-controller"
syscon0 at simplebus0: "qos"
syscon1 at simplebus0: "qos"
syscon2 at simplebus0: "qos"
syscon3 at simplebus0: "qos"
syscon4 at simplebus0: "qos"
syscon5 at simplebus0: "qos"
syscon6 at simplebus0: "qos"
syscon7 at simplebus0: "qos"
syscon8 at simplebus0: "qos"
syscon9 at simplebus0: "qos"
syscon10 at simplebus0: "qos"
syscon11 at simplebus0: "qos"
syscon12 at simplebus0: "qos"
syscon13 at simplebus0: "qos"
syscon14 at simplebus0: "qos"
syscon15 at simplebus0: "qos"
syscon16 at simplebus0: "qos"
syscon17 at simplebus0: "qos"
syscon18 at simplebus0: "qos"
syscon19 at simplebus0: "qos"
syscon20 at simplebus0: "qos"
syscon21 at simplebus0: "qos"
syscon22 at simplebus0: "qos"
syscon23 at simplebus0: "qos"
syscon24 at simplebus0: "qos"
syscon25 at simplebus0: "qos"
syscon26 at simplebus0: "qos"
syscon27 at simplebus0: "qos"
syscon28 at simplebus0: "qos"
syscon29 at simplebus0: "qos"
syscon30 at simplebus0: "qos"
syscon31 at simplebus0: "qos"
syscon32 at simplebus0: "syscon"
syscon33 at simplebus0: "syscon"
syscon34 at simplebus0: "syscon"
rkclock0 at simplebus0
rkclock_set_frequency(rkclock0, 372, 32768)
rkclock_set_frequency(rkclock0, 2, 1188000000)
rkclock_set_frequency(rkclock0, 3, 1000000000)
rkclock_set_frequency(rkclock0, 1, 996000000)
rkclock_set_frequency(rkclock0, 5, 408000000)
rkclock_set_frequency(rkclock0, 11, 250000000)
rkclock_set_frequency(rkclock0, 15, 500000000)
rkclock_set_frequency(rkclock0, 9, 150000000)
rkclock_set_frequency(rkclock0, 12, 300000000)
rkclock_set_frequency(rkclock0, 13, 340000000)
rkclock_set_frequency(rkclock0, 14, 400000000)
rkclock_set_frequency(rkclock0, 16, 600000000)
rkclock_set_frequency(rkclock0, 122, 50000000)
rkclock_set_frequency(rkclock0, 121, 100000000)
rkclock_set_frequency(rkclock0, 76, 500000000)
syscon35 at simplebus0: "syscon"
syscon36 at simplebus0: "power-management"
"power-controller" at syscon36 not configured
dwpcie0 at simplebus0
"gpu" at simplebus0 not configured
com0 at simplebus0: dw16550, 64 byte fifo
com0: console
rkiic0 at simplebus0
iic0 at rkiic0
"belling,bl24c16a" at iic0 addr 0x50 not configured
rkpwm0 at simplebus0
rkpwm1 at simplebus0
"adc" at simplebus0 not configured
dwqe0 at simplebus0 gmac 1: rev 0x51, address 22:22:22:22:22:22
ytphy0 at dwqe0 phy 1: YT8531, rev. 11
dwmshc0 at simplebus0
dwmshc0: SDHC 4.20, 200 MHz base clock
sdmmc0 at dwmshc0: 8-bit, sd high-speed, mmc high-speed, dma
dwmmc0 at simplebus0: 49 MHz base clock
sdmmc1 at dwmmc0: 4-bit, sd high-speed, mmc high-speed, dma
"dma-controller" at simplebus0 not configured
"phy" at simplebus0 not configured
"rng" at simplebus0 not configured
"nvmem" at simplebus0 not configured
pci0 at dwpcie0
ppb0 at pci0 dev 0 function 0 vendor "Rockchip", unknown product 0x3528 rev
0x00
pci1 at ppb0 bus 1
re0 at pci1 dev 0 function 0 "Realtek 8168" rev 0x15: RTL8168H/8111H
(0x5400), intx, address 11:11:11:11:11:11
rgephy0 at re0 phy 7: RTL8251, rev. 0
"adc-keys" at mainbus0 not configured
gpiokeys0 at mainbus0: "USER"
gpioleds0 at mainbus0: "lan", "heartbeat", "wan"
"regulator-0v9-vdd" at mainbus0 not configured
"regulator-1v1-vcc-ddr" at mainbus0 not configured
"regulator-1v8-vcc" at mainbus0 not configured
"regulator-3v3-vcc" at mainbus0 not configured
"regulator-5v0-vcc-sys" at mainbus0 not configured
"regulator-vccio-sd" at mainbus0 not configured
"binman" at mainbus0 not configured
"dmc" at mainbus0 not configured
scsibus0 at sdmmc0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: <SD/MMC, TLimmc, 0000>
sd0: 30056MB, 512 bytes/sector, 61554688 sectors
scsibus1 at sdmmc1: 2 targets, initiator 0
sd1 at scsibus1 targ 1 lun 0: <SD/MMC, JC1S5, 0030> removable
sd1: 61120MB, 512 bytes/sector, 125173760 sectors
vscsi0 at root
scsibus2 at vscsi0: 256 targets
softraid0 at root
scsibus3 at softraid0: 256 targets
root on sd1a (6d0736ea79c86850.a) swap on sd1b dump on sd1b
WARNING: CHECK AND RESET THE DATE!
Automatic boot in progress: starting file system checks.
/dev/sd1a (6d0736ea79c86850.a): file system is clean; not checking
/dev/sd1l (6d0736ea79c86850.l): file system is clean; not checking
/dev/sd1d (6d0736ea79c86850.d): file system is clean; not checking
/dev/sd1f (6d0736ea79c86850.f): file system is clean; not checking
/dev/sd1g (6d0736ea79c86850.g): file system is clean; not checking
/dev/sd1h (6d0736ea79c86850.h): file system is clean; not checking
/dev/sd1k (6d0736ea79c86850.k): file system is clean; not checking
/dev/sd1j (6d0736ea79c86850.j): file system is clean; not checking
/dev/sd1e (6d0736ea79c86850.e): file system is clean; not checking
pf enabled
starting network
reordering: ld.so libc libcrypto sshd sshd-session sshd-auth ssh-agent.
starting early daemons: syslogd pflogd ntpd.
starting RPC daemons:.
savecore: no core dump
checking quotas: done.
clearing /tmp
kern.securelevel: 0 -> 1
creating runtime link editor directory cache.
preserving editor files.
starting network daemons: sshd smtpd sndiod.
starting local daemons: cron.
Thu Mar 12 23:34:54 +04 2026

OpenBSD/arm64 (choco.my.domain) (console)

login:
...
choco$ ifconfig

lo0: flags=2008049<UP,LOOPBACK,RUNNING,MULTICAST,LRO> mtu 32768
        index 4 priority 0 llprio 3
        groups: lo
        inet6 ::1 prefixlen 128
        inet6 fe80::1%lo0 prefixlen 64 scopeid 0x4
        inet 127.0.0.1 netmask 0xff000000
dwqe0: flags=808802<BROADCAST,SIMPLEX,MULTICAST,AUTOCONF4> mtu 1500
        lladdr 22:22:22:22:22:22
        index 1 priority 0 llprio 3
        media: Ethernet autoselect (none)
        status: no carrier
re0: flags=808843<UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST,AUTOCONF4> mtu 1500
        lladdr 11:11:11:11:11:11
        index 2 priority 0 llprio 3
        groups: egress
        media: Ethernet autoselect (1000baseT full-duplex,rxpause,txpause)
        status: active
        inet 192.168.5.99 netmask 0xffffff00 broadcast 192.168.5.255
enc0: flags=0<>
        index 3 priority 0 llprio 3
        groups: enc
        status: active
pflog0: flags=141<UP,RUNNING,PROMISC> mtu 33136
        index 5 priority 0 llprio 3
        groups: pflog
choco$ ping 1.1.1.1
PING 1.1.1.1 (1.1.1.1): 56 data bytes
64 bytes from 1.1.1.1: icmp_seq=0 ttl=58 time=2.440 ms
64 bytes from 1.1.1.1: icmp_seq=1 ttl=58 time=1.888 ms
^C
--- 1.1.1.1 ping statistics ---
2 packets transmitted, 2 packets received, 0.0% packet loss
round-trip min/avg/max/std-dev = 1.888/2.164/2.440/0.276 ms

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