On 2022-06-03 14:50, Rodrigo Siqueira wrote:
> GCC throw warnings for the function dcn301_fpu_update_bw_bounding_box
> due to its frame size that looks like this:
> 
>  error: the frame size of 1936 bytes is larger than 1024 bytes 
> [-Werror=frame-larger-than=]
> 
> For fixing this issue I dropped an intermadiate variable.
> 
> Cc: Stephen Rothwell <[email protected]>
> Cc: Hamza Mahfooz <[email protected]>
> Cc: Aurabindo Pillai <[email protected]>
> Signed-off-by: Rodrigo Siqueira <[email protected]>

Reviewed-by: Harry Wentland <[email protected]>

Harry

> ---
>  .../amd/display/dc/dml/dcn301/dcn301_fpu.c    | 30 ++++++++-----------
>  1 file changed, 13 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c 
> b/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
> index 0a7a33864973..62cf283d9f41 100644
> --- a/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
> +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c
> @@ -249,7 +249,6 @@ void dcn301_update_bw_bounding_box(struct dc *dc, struct 
> clk_bw_params *bw_param
>  {
>       struct dcn301_resource_pool *pool = TO_DCN301_RES_POOL(dc->res_pool);
>       struct clk_limit_table *clk_table = &bw_params->clk_table;
> -     struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];
>       unsigned int i, closest_clk_lvl;
>       int j;
>  
> @@ -271,24 +270,21 @@ void dcn301_update_bw_bounding_box(struct dc *dc, 
> struct clk_bw_params *bw_param
>                               }
>                       }
>  
> -                     clock_limits[i].state = i;
> -                     clock_limits[i].dcfclk_mhz = 
> clk_table->entries[i].dcfclk_mhz;
> -                     clock_limits[i].fabricclk_mhz = 
> clk_table->entries[i].fclk_mhz;
> -                     clock_limits[i].socclk_mhz = 
> clk_table->entries[i].socclk_mhz;
> -                     clock_limits[i].dram_speed_mts = 
> clk_table->entries[i].memclk_mhz * 2;
> -
> -                     clock_limits[i].dispclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dispclk_mhz;
> -                     clock_limits[i].dppclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dppclk_mhz;
> -                     clock_limits[i].dram_bw_per_chan_gbps = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;
> -                     clock_limits[i].dscclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dscclk_mhz;
> -                     clock_limits[i].dtbclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz;
> -                     clock_limits[i].phyclk_d18_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;
> -                     clock_limits[i].phyclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].state = i;
> +                     dcn3_01_soc.clock_limits[i].dcfclk_mhz = 
> clk_table->entries[i].dcfclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].fabricclk_mhz = 
> clk_table->entries[i].fclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].socclk_mhz = 
> clk_table->entries[i].socclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].dram_speed_mts = 
> clk_table->entries[i].memclk_mhz * 2;
> +
> +                     dcn3_01_soc.clock_limits[i].dispclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dispclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].dppclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dppclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].dram_bw_per_chan_gbps = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;
> +                     dcn3_01_soc.clock_limits[i].dscclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dscclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].dtbclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz;
> +                     dcn3_01_soc.clock_limits[i].phyclk_d18_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;
> +                     dcn3_01_soc.clock_limits[i].phyclk_mhz = 
> dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_mhz;
>               }
>  
> -             for (i = 0; i < clk_table->num_entries; i++)
> -                     dcn3_01_soc.clock_limits[i] = clock_limits[i];
> -
>               if (clk_table->num_entries) {
>                       dcn3_01_soc.num_states = clk_table->num_entries;
>                       /* duplicate last level */

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