uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * 
adev->umc.channel_inst_num + ch_inst];

The code is too long, it can be separated into two lines.

With that fixed, the patch is:

Reviewed-by: Tao Zhou <[email protected]>
________________________________
From: amd-gfx <[email protected]> on behalf of Clements, 
John <[email protected]>
Sent: Tuesday, January 7, 2020 4:31 PM
To: Chen, Guchun <[email protected]>; [email protected] 
<[email protected]>
Subject: RE: [PATCH] drm/amdgpu: updated UMC error address record with correct 
channel index


[AMD Public Use]



Hello GuChun/Tao,



Thank you for your feedback, I have implemented both of your changes.



Thank you,

John Clements



From: Chen, Guchun <[email protected]>
Sent: Tuesday, January 7, 2020 4:10 PM
To: Clements, John <[email protected]>; [email protected]
Subject: RE: [PATCH] drm/amdgpu: updated UMC error address record with correct 
channel index



[AMD Public Use]



If we have to improve the macro definition for repetitive loops, I assume we 
can merge the two defines into one, like:



#define LOOP_UMC_CH_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < 
adev->umc.umc_inst##_num; (umc_inst)++)



Then when we call the double loop, it can be done like:

LOOP_UMC_CH_INST(umc_inst)

              LOOP_UMC_CH_INST(channel_inst) {…



Next we should name the macro more friendly.



Regards,

Guchun



From: Clements, John <[email protected]<mailto:[email protected]>>
Sent: Tuesday, January 7, 2020 3:28 PM
To: [email protected]<mailto:[email protected]>; 
dl.srdc_lnx_ras <[email protected]<mailto:[email protected]>>
Subject: [PATCH] drm/amdgpu: updated UMC error address record with correct 
channel index



[AMD Official Use Only - Internal Distribution Only]



Resolved issue with inputting an incorrect UMC channel index into the UMC error 
address record.



Defined macros for repetitive for loops



Thank you,

John Clements
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