AMD General

OK. Since Ce is working on it as well, he will refine his code per my patch and 
your suggestion.

Regards,
Tao

> -----Original Message-----
> From: Zhang, Hawking <[email protected]>
> Sent: Wednesday, July 15, 2026 4:27 PM
> To: Zhou1, Tao <[email protected]>; [email protected]
> Cc: Zhou1, Tao <[email protected]>
> Subject: RE: [PATCH 5/5] drm/amd/ras: add ras ce log switch for uniras
>
> AMD General
>
> +       init_config.debug_disable_ce_logs = adev->debug_disable_ce_logs;
>
> Let's pass the full amdgpu_debug_mask to ras core
>
> Regards,
> Hawking
>
> -----Original Message-----
> From: amd-gfx <[email protected]> On Behalf Of Tao Zhou
> Sent: Wednesday, July 15, 2026 3:48 PM
> To: [email protected]
> Cc: Zhou1, Tao <[email protected]>
> Subject: [PATCH 5/5] drm/amd/ras: add ras ce log switch for uniras
>
> So we can disable ce log manually.
>
> Signed-off-by: Tao Zhou <[email protected]>
> ---
>  drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 1 +
>  drivers/gpu/drm/amd/ras/rascore/ras.h            | 2 ++
>  drivers/gpu/drm/amd/ras/rascore/ras_aca.c        | 7 ++++++-
>  drivers/gpu/drm/amd/ras/rascore/ras_core.c       | 1 +
>  4 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
> b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
> index c55288c2df9a..1e95419989b4 100644
> --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
> +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
> @@ -310,6 +310,7 @@ static struct ras_core_context
> *amdgpu_ras_mgr_create_ras_core(struct amdgpu_dev
>                 amdgpu_ras_mgr_eeprom_is_supported(adev);
>         init_config.poison_supported =
>                 amdgpu_ras_is_poison_mode_supported(adev);
> +       init_config.debug_disable_ce_logs = adev->debug_disable_ce_logs;
>
>         amdgpu_ras_mgr_init_aca_config(adev, &init_config);
>         amdgpu_ras_mgr_init_eeprom_config(adev, &init_config); diff --git
> a/drivers/gpu/drm/amd/ras/rascore/ras.h 
> b/drivers/gpu/drm/amd/ras/rascore/ras.h
> index 5719bc1b6167..9d538a07c50e 100644
> --- a/drivers/gpu/drm/amd/ras/rascore/ras.h
> +++ b/drivers/gpu/drm/amd/ras/rascore/ras.h
> @@ -301,6 +301,7 @@ struct ras_core_config {
>
>         bool poison_supported;
>         bool ras_eeprom_supported;
> +       bool debug_disable_ce_logs;
>         const struct ras_sys_func *sys_fn;
>
>         struct ras_aca_config aca_cfg;
> @@ -348,6 +349,7 @@ struct ras_core_context {
>         bool ras_core_enabled;
>
>         u64 ras_fw_features;
> +       bool debug_disable_ce_logs;
>  };
>
>  struct ras_core_context *ras_core_create(struct ras_core_config 
> *init_config); diff --
> git a/drivers/gpu/drm/amd/ras/rascore/ras_aca.c
> b/drivers/gpu/drm/amd/ras/rascore/ras_aca.c
> index 67a35409ff0e..9760894c4c66 100644
> --- a/drivers/gpu/drm/amd/ras/rascore/ras_aca.c
> +++ b/drivers/gpu/drm/amd/ras/rascore/ras_aca.c
> @@ -98,7 +98,7 @@ static void aca_report_ecc_info(struct ras_core_context
> *ras_core,
>                         blk_name(blk));
>         }
>
> -       if (ecc_count.new_ce_count) {
> +       if (ecc_count.new_ce_count && !ras_core->debug_disable_ce_logs)
> + {
>                 RAS_DEV_INFO(ras_core->dev,
>                 "{%llu} socket: %d, die: %d, %u new correctable hardware 
> errors detected
> in %s block\n",
>                         seq_no, skt, aid, ecc_count.new_ce_count, 
> blk_name(blk)); @@ -
> 114,6 +114,11 @@ static void aca_bank_log(struct ras_core_context *ras_core,  
> {
>         int i;
>
> +       if (ras_core->debug_disable_ce_logs &&
> +           bank->ecc_type == RAS_ERR_TYPE__CE &&
> +           !bank_ecc->real_de_count)
> +               return;
> +
>         RAS_DEV_INFO(ras_core->dev,
>                 "{%llu}" RAS_HW_ERR "Accelerator Check Architecture events 
> logged\n",
>                 bank->seq_no);
> diff --git a/drivers/gpu/drm/amd/ras/rascore/ras_core.c
> b/drivers/gpu/drm/amd/ras/rascore/ras_core.c
> index 2346918c7736..cdef7727decb 100644
> --- a/drivers/gpu/drm/amd/ras/rascore/ras_core.c
> +++ b/drivers/gpu/drm/amd/ras/rascore/ras_core.c
> @@ -377,6 +377,7 @@ int ras_core_hw_init(struct ras_core_context *ras_core)
>                         ras_core->config->ras_eeprom_supported;
>
>         ras_core->poison_supported = ras_core->config->poison_supported;
> +       ras_core->debug_disable_ce_logs =
> +ras_core->config->debug_disable_ce_logs;
>
>         ret = ras_psp_hw_init(ras_core);
>         if (ret)
> --
> 2.34.1
>

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