On Wed, Dec 17, 2008 at 10:59:08AM +0100, Michel Dänzer wrote: > On Wed, 2008-12-17 at 18:11 +1100, garrone wrote: > > The mesa direct rendering with the intel driver appears to rely on > > asychronous flipping. However the hardware, according to the 965 > > documentation I have downloaded from the intellinuxgraphics site, is > > capable of synchronous flips. > > > > (The kernel file i915_dma.c ors in the "ASYNC_FLIP" constant in the function > > i915_dispatch_flip, invoked eventually by a call to glXSwapBuffers. > > For a description of the hardware capability, > > refer to volume 1 of the 965 graphics pdf files, searching for the > > command MI_DISPLAY_FLIP) > > > > The application I am targeting has dual opengl windows, > > each one running on a separate display, and covering the whole of that > > display, from a single Intel graphics chipset. > > This was working with synchronous flips at some point at least on > i915/i945 hardware, but I think the functionality has been ripped out > again because GEM didn't mix well with it. >
Thanks. I'm gradually following the pathway through the source. My original post was mistaken, because the function i915_dispatch_flip is in fact never called as part of the vertical blank cycle, on my setup anyway. So in fact no flipping, synchronous or asynchronous occurs, rather there is a buffer copy operation and then the opengl front buffer is scanned directly, in effect. And this works, for a single window on a single display. If you have multiple displays though, there is a problem. I wonder why GEM doesn't mix well with page flipping or triplebuffer. I suppose it allows graphics memory to be backed by swap. Peter Garrone _______________________________________________ xorg mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/xorg
