On 12.04.2021 12:22, Andrew Cooper wrote: > --- a/xen/arch/x86/cpuid.c > +++ b/xen/arch/x86/cpuid.c > @@ -456,6 +456,12 @@ static void __init calculate_hvm_max_policy(void) > __set_bit(X86_FEATURE_X2APIC, hvm_featureset); > > /* > + * We don't support EFER.LMSLE at all. AMD has dropped the feature from > + * hardware and allocated a CPUID bit to indicate its absence. > + */ > + __set_bit(X86_FEATURE_NO_LMSLE, hvm_featureset);
Why only for HVM? And shouldn't the LM: entry in the dependencies table be adjusted such that !LM implies this bit clear? Jan
