Document the behavior and the main registers usage within enable_mmu().
Signed-off-by: Julien Grall <[email protected]>
Reviewed-by: Stefano Stabellini <[email protected]>
---
Changes in v3:
- Add Stefano's acked-by
Changes in v2:
- Patch added
---
xen/arch/arm/arm32/head.S | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 83f8774e2a..f8603051e4 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -423,6 +423,13 @@ virtphys_clash:
b fail
ENDPROC(create_page_tables)
+/*
+ * Turn on the Data Cache and the MMU. The function will return on the 1:1
+ * mapping. In other word, the caller is responsible to switch to the runtime
+ * mapping.
+ *
+ * Clobbers r0 - r3
+ */
enable_mmu:
PRINT("- Turning on paging -\r\n")
--
2.11.0
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