> -----Original Message----- > From: Roger Pau Monne [mailto:[email protected]] > Sent: 23 January 2019 09:48 > To: [email protected] > Cc: Roger Pau Monne <[email protected]>; Suravee Suthikulpanit > <[email protected]>; Brian Woods <[email protected]>; > Juergen Gross <[email protected]>; Paul Durrant <[email protected]> > Subject: [PATCH for-4.12] amd/iommu: fix present bit checking when > clearing PTE > > The current check for the present bit is wrong, since the present bit > is located in the low part of the entry. > > Fixes: e8afe1124cc1 ("iommu: elide flushing for higher order map/unmap > operations") > Signed-off-by: Roger Pau Monné <[email protected]>
No idea how I managed to get that wrong. I had a bad feeling at the time about not accessing the pte as a uint32_t[2] array. Reviewed-by: Paul Durrant <[email protected]> > --- > Cc: Suravee Suthikulpanit <[email protected]> > Cc: Brian Woods <[email protected]> > Cc: Juergen Gross <[email protected]> > Cc: Paul Durrant <[email protected]> > --- > xen/drivers/passthrough/amd/iommu_map.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/xen/drivers/passthrough/amd/iommu_map.c > b/xen/drivers/passthrough/amd/iommu_map.c > index 99ac0a6862..67329b0c95 100644 > --- a/xen/drivers/passthrough/amd/iommu_map.c > +++ b/xen/drivers/passthrough/amd/iommu_map.c > @@ -39,15 +39,13 @@ static unsigned int clear_iommu_pte_present(unsigned > long l1_mfn, > unsigned long dfn) > { > uint64_t *table, *pte; > - uint32_t entry; > unsigned int flush_flags; > > table = map_domain_page(_mfn(l1_mfn)); > > pte = (table + pfn_to_pde_idx(dfn, 1)); > - entry = *pte >> 32; > > - flush_flags = get_field_from_reg_u32(entry, IOMMU_PTE_PRESENT_MASK, > + flush_flags = get_field_from_reg_u32(*pte, IOMMU_PTE_PRESENT_MASK, > IOMMU_PTE_PRESENT_SHIFT) ? > IOMMU_FLUSHF_modified : 0; > > -- > 2.20.1 _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
