On 28/12/2018 12:39, Andrew Cooper wrote:
> c/s fd32dcfe4c "x86/vmx: Don't leak EFER.NXE into guest context" had an
> unintended consequence on Harpertown cores which, as it turns out, don't
> load MSR_EFER fully from the MSR Load List - on reentry to the guest,
> EFER.SCE is clear irrespective of the value in load list.
>
> This, being catastrophic to 64bit guests, is far worse than the EFER.NXE
> leakage which was trying to be fixed.
>
> Introduce cpu_bug_msr_ll_efer_sce to encapsulate this partial revert.
> Avoid adding MSR_EFER to the Load Lists on impacted hardware, and
> reintroduce the logic to use the guests EFER.SCE setting.
>
> In the common case of running 64bit HVM guests, these extra adjustments
> to EFER should only be hit during guest boot.
>
> Signed-off-by: Andrew Cooper <[email protected]>
> ---
> CC: Jan Beulich <[email protected]>
> CC: Wei Liu <[email protected]>
> CC: Roger Pau Monné <[email protected]>
> CC: Jun Nakajima <[email protected]>
> CC: Kevin Tian <[email protected]>
>
> This is RFC at the moment, because the test lab is full at the moment
> and I don't have a Harpertown CPU to hand.  I'm fairly sure the change
> is complete and will test when it becomes available, but I don't expect
> to make any code changes.

Sadly testing says no.  I'll try and figure out what is going on here.

~Andrew

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