On 02/11/18 13:00, Jan Beulich wrote: >>>> On 02.11.18 at 13:54, <[email protected]> wrote: >> @@ -191,9 +197,26 @@ struct vm_event_regs_x86 { >> uint64_t msr_efer; >> uint64_t msr_star; >> uint64_t msr_lstar; >> + uint32_t cs_base; >> + uint32_t ss_base; >> + uint32_t ds_base; >> + uint32_t es_base; >> uint64_t fs_base; >> uint64_t gs_base; >> - uint32_t cs_arbytes; >> + struct vm_event_x86_selector_reg cs; >> + struct vm_event_x86_selector_reg ss; >> + struct vm_event_x86_selector_reg ds; >> + struct vm_event_x86_selector_reg es; >> + struct vm_event_x86_selector_reg fs; >> + struct vm_event_x86_selector_reg gs; >> + uint64_t shadow_gs; >> + uint64_t dr6; >> + uint16_t cs_sel; >> + uint16_t ss_sel; >> + uint16_t ds_sel; >> + uint16_t es_sel; >> + uint16_t fs_sel; >> + uint16_t gs_sel; >> uint32_t _pad; >> }; > Do we really need dr6 be 64 bits wide?
Given that the other %cr and %dr registers are 64bit, I'd argue in favour of consistency. ~Andrew _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
