On 22/10/18 11:53, Wei Liu wrote:
> On Fri, Oct 19, 2018 at 06:52:02PM -0400, Boris Ostrovsky wrote:
>> On 10/19/18 11:14 AM, Andrew Cooper wrote:
>>> diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
>>> index 7a061b2..c1cb38f 100644
>>> --- a/xen/include/asm-x86/msr.h
>>> +++ b/xen/include/asm-x86/msr.h
>>> @@ -287,6 +287,12 @@ struct vcpu_msrs
>>> bool cpuid_faulting:1;
>>> };
>>> } misc_features_enables;
>>> +
>>> + /*
>>> + * 0xc00110{27,19-1b} MSR_AMD64_DR{0-3}_ADDRESS_MASK
>>> + * TODO: Not yet handled by guest_{rd,wr}msr() infrastructure.
>>> + */
>>> + uint32_t dr_mask[4];
>>> };
>>>
>> You don't think wrapping these into an intel/amd union would be useful?
> Same question here. DR masks seem to be AMD specific.
Does the svm/vt-x here pertain to the host processor, or the guest
cross-vendor setting? (That's a rhetorical question. Its a complete
can of worms which I don't want to open).
For the sake of 16 bytes, I don't think its worth it. We can always
revisit this in the future if necessary.
~Andrew
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