On 06/09/18 12:26, Jan Beulich wrote:
>>>> On 06.09.18 at 10:27, <[email protected]> wrote:
>> On 06/09/18 10:10, Jan Beulich wrote:
>>>>>> On 06.09.18 at 09:34, <[email protected]> wrote:
>>>> I've setup a little example Makefile solving the problem (just to show
>>>> the correct dependencies, needs to be adapted for naming the .d and .d2
>>>> files and how to build the .d2):
>>>>
>>>> -->8 snip here 8<--
>>>>
>>>> DEPS := tst.d2
>>>>
>>>> all: tst $(DEPS)
>>>
>>> -include $(DEPS) already ought to have the effect of such a dependency,
>>> since all makefiles are checked for rules of how to re-make them.
>>
>> Obviously this isn't the case. Otherwise there would be .d2 files more
>> common after doing a make.
> 
> Well, be this (mis?)behavior is what needs explaining first.

In my example Makefile this is working as you are expecting it: even
with removing the dependency of "all" on $(DEPS) everything is fine.

I suspect there are no .d2 files after the first make due to:

DEPS = .*.d
DEPS_INCLUDE = $(addsuffix .d2, $(basename $(wildcard $(DEPS))))

In the beginning there is no .d file, so DEPS_INCLUDE will be empty.

> 
>>>> %.o %.d: %.c
>>>>         gcc -MMD -o $(patsubst %.c,%.o,$<) -c $<
>>>
>>> Doesn't this result in gcc to be invoked twice, perhaps resulting in
>>> corrupt .o and/or .d? I think %.d wants to depend on %.o, without
>>> a command.
>>
>> No, that's perfectly fine. make will invoke the command only once, its
>> just not clear for which target (that's the reason I need to use the
>> $(patsubst %.c,%.o,$<) instead of $@, which might be the .o _or_ the .d
>> file).
>>
>> From the make docs:
>>
>>   Pattern rules may have more than one target. Unlike normal rules, this
>>   does not act as many different rules with the same prerequisites and
>>   recipe. If a pattern rule has multiple targets, make knows that the
>>   rule’s recipe is responsible for making all of the targets. The recipe
>>   is executed only once to make all the targets.
> 
> Oh, right. But then there's no need to play games - just use $*.

Aah, right. Good idea.

> 
>>>> %: %.o
>>>>         gcc $< -o $@
>>>>
>>>> -include $(DEPS)
>>>>
>>>> -->8 snip here 8<--
>>>>
>>>> So the basic ideas are:
>>>>
>>>> - add a rule for constructing the .d files
>>>> - let the build depend on the .d2 files
>>>
>>> IOW I wonder whether this really is any different from what we
>>> do now (minus bugs/quirks in make itself, of course). And from this
>>> as well as your original mail I still don't understand what's actually
>>> broken with the current approach.
>>
>> The main problem is that the .d2 files used for determining which object
>> files need to be (re-)built are based on the build before the last one.
>> I'm not sure this is always the case, but at least when starting with a
>> clean tree I need two invocations of "make" to get all .d2 files built.
> 
> But that's correct: They're not needed _until_ a rebuild happens.
> And by way of make's rebuilding of makefiles (if there are suitable
> rules) they should appear _before_ any .o gets rebuilt, and even
> before make evaluates which ones need rebuilding.

Okay. Then the issue I'm after seems to be a different one.

And now I know what is wrong with the build in tools/tests/depriv:

There are no .o files specified for depriv-fd-checker, so it is built
via:

gcc $(CFLAGS) depriv-fd-checker.c $(LDFLAGS) -o depriv-fd-checker

I'm suspecting the source file is specified via $<, as the resulting
command line after touching one of the headers is:

gcc $(CFLAGS) depriv-fd-checker.c <all-headers-from-d2-file> $(LDFLAGS)
-o depriv-fd-checker

So all files the program is depending on are added into the parameters
of gcc. This is the reason for the build error I'm seeing.


Juergen

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