Currently, Xen exposes the host CPUID as-is, which is not correct on hardware
that implements PMU features that are not supported by Xen (e.g AnyThread bit
of PMU version 3, IA32_PERF_GLOBAL_INUSE of PMU version 4, and many other
things).

As we're actually virtualizing PMU version 2 (as version 3 is the same as
version 2 with the addition to AnyThread bit, which is we don't support since
[1]), adjust the messages related to PMU emulation to account that.

[1] 9f5390441a6e ("x86/vpmu_intel: handle SMT consistently for programmable and 
fixed counters")

Signed-off-by: Teddy Astie <[email protected]>
---
It could sound weird that we're now exposing version 2, while we were previously
(wrongly) exposing version 3. Version 3 mostly works because the guest is not
aware of hyperthreads, hence is not expected to try using AnyThread bit (which
currently faults due to consistency checks). But we were still actually 
virtualizing
PMU version 2.

 xen/arch/x86/cpu-policy.c     | 33 ++++++++++++++++++++++++++++++++-
 xen/arch/x86/cpu/vpmu_intel.c |  4 ++--
 2 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 5273fe0ae4..7f4456d5a2 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -253,6 +253,33 @@ static void recalculate_xstate(struct cpu_policy *p)
     }
 }
 
+static void sanitise_vpmu(struct cpu_policy *p)
+{
+switch ( p->x86_vendor )
+    {
+    case X86_VENDOR_INTEL:
+        if ( !p->basic.pmu.version )
+            return;
+
+        /*
+         * Expose up to PMU version 2 
+         *
+         * PMU version 3 introduced the AnyThread bit we don't want
+         * to support (see "AnyThread Counting and Software Evolution"
+         * regarding notes with virtualization). This is the only known
+         * feature introduced in PMU version 3.
+         *
+         * PMU version 5 deprecated AnyThread, and introduced a CPUID
+         * bit (ANYTHREAD_DEPRECATION) to indicate that this bit isn't 
supported.
+         * That CPUID bit should be set for PMU version 5.
+         */
+        if ( p->basic.pmu.version > 2 )
+            p->basic.pmu.version = 2;
+
+        break;
+    }
+}
+
 /*
  * Misc adjustments to the policy.  Mostly clobbering reserved fields and
  * duplicating shared fields.  Intentionally hidden fields are annotated.
@@ -391,6 +418,8 @@ static void __init calculate_host_policy(void)
     /* When vPMU is disabled, drop it from the host policy. */
     if ( vpmu_mode == XENPMU_MODE_OFF )
         p->basic.raw[0xa] = EMPTY_LEAF;
+    else
+        sanitise_vpmu(p);
 
     /* 0x000000ce  MSR_INTEL_PLATFORM_INFO */
     /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES 
*/
@@ -841,7 +870,7 @@ static void __init calculate_hvm_max_policy(void)
         /* Enable features which are always emulated. */
         p->extd.raw[0xa].d |= (1u << SVM_FEATURE_VMCBCLEAN);
     }
-    
+
     guest_common_max_feature_adjustments(fs);
     guest_common_feature_adjustments(fs);
 
@@ -1054,6 +1083,8 @@ void recalculate_cpuid_policy(struct domain *d)
     if ( vpmu_mode == XENPMU_MODE_OFF ||
          ((vpmu_mode & XENPMU_MODE_ALL) && !is_hardware_domain(d)) )
         p->basic.raw[0xa] = EMPTY_LEAF;
+    else
+        sanitise_vpmu(p);
 
     if ( !p->extd.svm )
         p->extd.raw[0xa] = EMPTY_LEAF;
diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index f43faf9567..85539ce6c5 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -901,14 +901,14 @@ const struct arch_vpmu_ops *__init core2_vpmu_init(void)
 
     switch ( version )
     {
+    case 3:
     case 4:
     case 5:
         printk(XENLOG_INFO "VPMU: PMU version %u is not fully supported. "
-               "Emulating version 3\n", version);
+               "Emulating version 2\n", version);
         /* FALLTHROUGH */
 
     case 2:
-    case 3:
         break;
 
     default:
-- 
2.53.0



--
Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech


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