Hi, On 28/11/2025 11:49, Michal Orzel wrote:
Prior to introducing GICv3 eSPI support, writes to these registers were ignored. Now the behavior is changed and we inject fault to the guests. According to documentation, eSPI registers are treated as RES0, when GICD_TYPER.ESPI is 0 (this would be the case when CONFIG_GICV3_ESPI=n or nr_espis is 0). Restore the previous behavior by checking whether eSPI is in use or not.Fixes: 93eecb2c4b88 ("xen/arm: vgic-v3: add emulation of GICv3.1 eSPI registers") Signed-off-by: Michal Orzel <[email protected]>
Reviewed-by: Julien Grall <[email protected]> Cheers, -- Julien Grall
