Intel provide CPU sensors through "DTS" MSRs. As there MSR are core-specific (or package-specific), we can't reliably fetch them from Dom0 directly. Expose these MSR (if supported) through XENPF_resource_op so that it is accessible through hypercall.
Suggested-by: Jan Beulich <[email protected]> Signed-off-by: Teddy Astie <[email protected]> --- v2: - move DTS MSR out of legacy list, review MSR naming - use CPU policy instead of inline CPUID xen/arch/x86/include/asm/msr-index.h | 3 +++ xen/arch/x86/platform_hypercall.c | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index df52587c85..7c6af7bd4d 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -115,6 +115,9 @@ #define MCU_OPT_CTRL_GDS_MIT_DIS (_AC(1, ULL) << 4) #define MCU_OPT_CTRL_GDS_MIT_LOCK (_AC(1, ULL) << 5) +#define MSR_DTS_TEMPERATURE_TARGET 0x000001a2 +#define MSR_DTS_PACKAGE_THERM_STATUS 0x000001b1 + #define MSR_FRED_RSP_SL0 0x000001cc #define MSR_FRED_RSP_SL1 0x000001cd #define MSR_FRED_RSP_SL2 0x000001ce diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c index 79bb99e0b6..d9872ddd3e 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -27,6 +27,7 @@ #include <asm/current.h> #include <public/platform.h> #include <acpi/cpufreq/processor_perf.h> +#include <asm/cpu-policy.h> #include <asm/edd.h> #include <asm/microcode.h> #include <asm/mtrr.h> @@ -86,6 +87,11 @@ static bool msr_read_allowed(unsigned int msr) case MSR_MCU_OPT_CTRL: return cpu_has_srbds_ctrl; + + case MSR_IA32_THERM_STATUS: + case MSR_DTS_TEMPERATURE_TARGET: + case MSR_DTS_PACKAGE_THERM_STATUS: + return raw_cpu_policy.basic.pm.dts; } if ( ppin_msr && msr == ppin_msr ) -- 2.51.2 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech
