On 22/04/2025 9:26 am, Jan Beulich wrote: > On 17.04.2025 18:19, Roger Pau Monne wrote: >> @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c) >> } >> } >> >> +/* >> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a >> logical >> + * processor to wait in a sleep state until a store to the armed address >> range >> + * occurs. Due to this erratum, stores to the armed address range may not >> + * trigger MWAIT to resume execution. >> + * >> + * ICX143: Under complex microarchitectural conditions, a monitor that is >> armed >> + * with the MWAIT instruction may not be triggered, leading to a processor >> + * hang. >> + * >> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit. > I didn't manage to spot all three spec updates; none of these have a ucode > fix, > hence permitting the workaround to be avoided? > > Since CPX is 3rd Gen Xeon Scalable just like ICX is, I'm surprised that one's > unaffected. The most recent spec update there is a year old than ICX'es, so > may simply be too old to include the erratum?
CPX being "3rd generation" is especially creative marketing. It's literally another stepping of SKX/CLX with some extra AVX512 instructions, so is an entire "tock" away from ICX. > Sunny Cove is used by further Icelake models - they're known to be unaffected? ICX143 is specific to the server design. It doesn't affect the client design. ~Andrew
