On Tue, 1 Apr 2025, Luca Fancellu wrote: > From: Penny Zheng <[email protected]> > > ARM MPU system doesn't need to use paging memory pool, as MPU memory > mapping table at most takes only one 4KB page, which is enough to > manage the maximum 255 MPU memory regions, for all EL2 stage 1 > translation and EL1 stage 2 translation. > > Introduce ARCH_PAGING_MEMPOOL Kconfig common symbol, selected for Arm > MMU systems and x86. Removed stubs from RISC-V now that the common code > provide them and the functions are not gonna be used. > > Wrap the code inside 'construct_domU' that deal with p2m paging > allocation in a new function 'domain_p2m_set_allocation', protected > by ARCH_PAGING_MEMPOOL, this is done in this way to prevent polluting > the former function with #ifdefs and improve readability > > Introduce arch_{get,set}_paging_mempool_size stubs for architecture > with !ARCH_PAGING_MEMPOOL. > > Remove 'struct paging_domain' from Arm 'struct arch_domain' when the > field is not required. > > Signed-off-by: Penny Zheng <[email protected]> > Signed-off-by: Wei Chen <[email protected]> > Signed-off-by: Luca Fancellu <[email protected]> > Reviewed-by: Michal Orzel <[email protected]> # arm > Reviewed-by: Oleksii Kurochko <[email protected]> # riscv
Reviewed-by: Stefano Stabellini <[email protected]>
