On 26.03.2024 16:57, Matthew Barnes wrote: >>> This patch scans each APIC ID before constructing the MADT, and uses the >>> x2APIC entry for each vCPU whose APIC ID exceeds the size limit imposed >>> by regular APIC entries. >> >> It is my understanding that if you use any x2APIC entry, every CPU needs >> to have one. > > In the ACPI 6.4 specification, section 5.2.12.12, the note says the following: > > [Compatibility note] On some legacy OSes, Logical processors with APIC ID > values less than 255 (whether in XAPIC or X2APIC mode) must use the Processor > Local APIC structure to convey their APIC information to OSPM, and those > processors must be declared in the DSDT using the Processor() keyword. > > Therefore, even in X2APIC mode, it's better to represent processors with APIC > ID values less than 255 with APIC entries for legacy reasons.
Well, my reading of that is different: All CPUs need to have x2APIC entries if one has, and CPUs with small enough APIC IDs _additionally_ need xAPIC entries. That's what I've been observing on real hardware, too. Jan
