On 9/22/23 18:27, Volodymyr Babchuk wrote: > ITS manages Device Tables and Interrupt Translation Tables on its own, > so generally we are not interested in maintaining any coherence with > CPU's view of those memory regions, except one case: ITS requires that > Interrupt Translation Tables should be initialized with > zeroes. Existing code already does this, but it does not cleans > caches afterwards. This means that ITS may see un-initialized ITT and > CPU can overwrite portions of ITT later, when it finally decides to > flush caches. Visible effect of this issue that there are not > interrupts delivered from a device. > > Fix this by calling clean_and_invalidate_dcache_va_range() for newly > allocated ITT. > > Signed-off-by: Volodymyr Babchuk <[email protected]>
Tested-by: Stewart Hildebrand <[email protected]> > > --- > > Changes since v1: > - Use clean_and_invalidate_dcache_va_range() instead of > clean_dcache_va_range() > - Do this unconditionally > - Do not rename HOST_ITS_FLUSH_CMD_QUEUE into HOST_ITS_FLUSH_BUFFERS > --- > xen/arch/arm/gic-v3-its.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index 3aa4edda10..8afcd9783b 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -685,6 +685,9 @@ int gicv3_its_map_guest_device(struct domain *d, > if ( !itt_addr ) > goto out_unlock; > > + clean_and_invalidate_dcache_va_range(itt_addr, > + nr_events * hw_its->itte_size); > + > dev = xzalloc(struct its_device); > if ( !dev ) > goto out_unlock; > -- > 2.42.0
