Lots of this is very very broken, but we need to start somewhere. PENDING_DBG, INTERRUPTIBILITY and ACTIVITY are internal pipeline registers which Intel exposed to software in the VMCS, and AMD exposed a subset of in the VMCB. Importantly, bits set in PENDING_DBG can survive across multiple instruction boundaries if e.g. delivery of #DB is delayed by a MovSS.
For now, introduce a full pending_dbg field into the retire union. This keeps the sh_page_fault() and init_context() paths working but in due course the field will want to lose the "retire" infix. In addition, set singlestep into pending_dbg as appropriate. Leave the old singlestep bitfield in place until we can adjust the callers to handle it properly. Signed-off-by: Andrew Cooper <[email protected]> --- CC: Jan Beulich <[email protected]> CC: Roger Pau Monné <[email protected]> CC: Wei Liu <[email protected]> CC: Jinoh Kang <[email protected]> --- xen/arch/x86/x86_emulate/x86_emulate.c | 6 +++++- xen/arch/x86/x86_emulate/x86_emulate.h | 17 ++++++++++++++--- 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index e88245eae9fb..de707c8ec211 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -8379,7 +8379,10 @@ x86_emulate( if ( !mode_64bit() ) _regs.r(ip) = (uint32_t)_regs.r(ip); - /* Should a singlestep #DB be raised? */ + if ( singlestep ) + ctxt->retire.pending_dbg |= X86_DR6_BS; + + /* Should a singlestep #DB be raised? (BROKEN - TODO, merge into pending_dbg) */ if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss ) { ctxt->retire.singlestep = true; @@ -8659,6 +8662,7 @@ int x86_emulate_wrapper( { typeof(ctxt->retire) retire = ctxt->retire; + retire.pending_dbg = 0; retire.unblock_nmi = false; ASSERT(!retire.raw); } diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index 698750267a90..f0e74d23c378 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -588,15 +588,26 @@ struct x86_emulate_ctxt /* Canonical opcode (see below) (valid only on X86EMUL_OKAY). */ unsigned int opcode; - /* Retirement state, set by the emulator (valid only on X86EMUL_OKAY). */ + /* + * Retirement state, set by the emulator (valid only on X86EMUL_OKAY/DONE). + * + * TODO: all this state should be input/output from the VMCS PENDING_DBG, + * INTERRUPTIBILITY and ACTIVITIY fields. + */ union { - uint8_t raw; + unsigned long raw; struct { + /* + * Accumulated %dr6 trap bits, positive polarity. Should only be + * interpreted in the case of X86EMUL_OKAY/DONE. + */ + unsigned int pending_dbg; + bool hlt:1; /* Instruction HLTed. */ bool mov_ss:1; /* Instruction sets MOV-SS irq shadow. */ bool sti:1; /* Instruction sets STI irq shadow. */ bool unblock_nmi:1; /* Instruction clears NMI blocking. */ - bool singlestep:1; /* Singlestepping was active. */ + bool singlestep:1; /* Singlestepping was active. (TODO, merge into pending_dbg) */ }; } retire; -- 2.30.2
